IP Library Granted Patent US 7,016,350
Granted Patent B2
US 7,016,350 · App. 09/850,320 · Granted Mar 21, 2006

Data switch and a method for controlling the data switch

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,016,350
App. No.
09/850,320
Granted
Mar 21, 2006
Kind
B2
Abstract

A data switch is proposed of the type having virtual queue ingress routers interconnected with egress routers by way of a memoryless switching matrix controlled by a control unit which performs an arbitration process to schedule connections across the switch. This scheduling is performed to ensure that data cells which arrive at the ingress routers at unpredictable times are transmitted to the correct egress routers. Each ingress router further includes a queue for time division multiplex traffic, and at times when such traffic exists, the control unit overrides the arbitration process to allow the time division multiplex traffic to be transmitted through the switch.

Claims (17)

1. A data switching system having a plurality of virtual output queue ingress routers, a plurality of egress routers, a control unit, and a memory-less switching matrix for interconnecting selected ingress routers and egress routers,

the ingress routers being arranged to receive data traffic segregated into equal sized cells having a header including an egress router output path address, to route the cells into virtual output queues in the ingress router in accordance with the egress router output path address and to generate connection requests for transmission to the control unit,

the control unit being arranged to arbitrate among the connection requests and control the switching matrix to schedule the connections across the switch,

wherein a separate queue is provided in each ingress router for time division multiplex traffic segmented into a plurality of standard cells and the control unit includes a time division multiplex connection unit arranged to override the normal arbitration procedure for each time division multiplex frame and to provide the switch connections for the cells of the time division multiplex frame,

the control unit being arranged, in each of a plurality of arbitration periods, to determine whether the requests include requests compatible with said connections specified by the time division multiplex connection unit, and, if one or more such requests are found, to control the switching matrix to perform the connection specified by these requests, the control unit including a first pipeline stage performed by said time division multiplex connection unit, a second pipeline stage for satisfying any multicast requests compatible with the connections specified by the time division multiplex connection unit, and one or more stages for satisfying unicast requests compatible with the connections specified by the time division multiplex connection unit and by any satisfied multicast requests.

2. A system according to claim 1 in which the time division multiplex connection unit includes an interface for receiving data specifying the switch connections for the cells of the time division multiplex frame.

3. A system according to claim 1 further including, for each ingress router, a processor which receives time division multiplex traffic in a first format and converts it into standard cells.

4. A system according to claim 3 in which the processor includes an interface for receiving data specifying how time division multiplex traffic is converted into standard cells.

5. A data switching method for controlling a data switch having a plurality of virtual output queue ingress routers, a plurality of egress routers, a control unit, and a memory-less switching matrix for interconnecting selected ingress routers and egress routers,

the ingress routers being arranged to receive data traffic segregated into equal sized cells having a header including an egress router output path address, to route the cells into virtual output queues in the ingress router in accordance with the egress router output path address and to generate connection requests for transmission to the control unit,

the control unit being arranged to arbitrate among the connection requests and control the switching matrix to schedule the connections across the switch,

wherein the method includes: providing a separate queue in each ingress router for time division multiplex traffic segmented into a plurality of standard cells; and

using a time division multiplex connection unit to override the normal arbitration procedure for each time division multiplex frame to provide the switch connections for the cells of the time division multiplex frame,

determining whether said requests include requests compatible with said connections specified by the time division mutiplex connection unit, and, if one or more such requests are found, to control the switching matrix to perform the connection specified by these requests in which said determination step includes a stage of satisfying any multicast requests compatible with the connections specified by the time division multiplex connection unit, and one or more stages of satisfying unicast requests compatible with the connections specified by the time division multiplex connection unit and by any satisfied multicast requests.

6. A method according to claim 5 further including storing in the time division multiplex connection unit data specifying the switch connections for the cells of the time division multiplex frame.

7. A method according to claim 5 further including receiving time division multiplex traffic in a first format, converting it into standard cells, and transmitting it to said ingress routers.

8. A method according to claim 7 in which the conversion is performed by a processor which includes an interface for receiving data specifying how time division multiplex traffic is to be converted into standard cells.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
RELEASE OF SECURITY INTEREST Recorded May 18, 2012
From: KREOS CAPITAL III (LUXEMBOURG) S.A.R.L
To: MICRON TECHNOLOGY, INC
Reel/Frame 028233/0608 →