IP Library Granted Patent US 6,912,618
Granted Patent B2
US 6,912,618 · App. 09/850,790 · Granted Jun 28, 2005

Direct logical block addressing flash memory mass storage architecture

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Quick Facts
Patent No.
US 6,912,618
App. No.
09/850,790
Granted
Jun 28, 2005
Kind
B2
Abstract

A nonvolatile semiconductor mass storage system and architecture can be substituted for a rotating hard disk. The system and architecture avoid an erase cycle each time information stored in the mass storage is changed. Erase cycles are avoided by programming an altered data file into an empty mass storage block rather than over itself as a hard disk would. Periodically, the mass storage will need to be cleaned up. These advantages are achieved through the use of several flags, and a map to correlate a logical block address of a block to a physical address of that block. In particular, flags are provided for defective blocks, used blocks, and old versions of a block. An array of volatile memory is addressable according to the logical address and stores the physical address.

Claims (14)

1. A storage device comprising:

a. a volatile memory device having a plurality of volatile memory locations each of which is uniquely addressable by a logical block address, each of the volatile memory locations being configured to store a physical block address without requiring the storage of a corresponding logical block address;

b. one or more nonvolatile memory devices, coupled to the volatile memory, each of said one or more nonvolatile memory devices being organized into a plurality of nonvolatile data blocks, wherein each block is selectively programmable and erasable and further wherein each block is uniquely addressable by one of the physical block addresses, and further wherein the plurality of blocks have stored therein status information indicative of the status of the information stored in each block; and

c. circuitry for receiving a block of data to be stored in the one or more nonvolatile memory devices, for receiving a target logical block address, for identifying a free particular block within the nonvolatile blocks having no data stored therein, and for storing the physical block address of the particular block in the volatile memory location that corresponds to the target logical block address,

wherein the status information stored in the one or more nonvolatile memory devices which correlate to the physical block addresses of the plurality of nonvolatile data blocks are copied to the volatile memory locations during power-up.

2. A storage device as recited in claim 1 further comprising means for addressing one of the plurality of volatile memory locations using a desired logical block addresses, means for retrieving a physical block address stored in the volatile memory location that corresponds to the desired logical block address and means for reading a data block within the nonvolatile memory devices identified by the retrieved physical block address.

3. A storage device as recited in claim 1 wherein the status information is at least one flag.

4. A storage device as recited in claim 3 wherein the at least one flag includes a used/free flag for indicating whether or not a data block contains valid data.

5. A storage device as recited in claim 4 wherein the used/free flags are stored in the one or more nonvolatile memory devices and are copied to the volatile memory locations during a system reset.

6. A storage device as recited in claim 3 further comprising a plurality of old/new flags, one stored with each data block in the one or more volatile memory devices for indicating whether or not the data block contains data that has been superseded.

7. A storage device as recited in claim 6 wherein the old/new flags stored in the one or more nonvolatile memory devices which correlate to the physical block addresses of the plurality of nonvolatile data blocks are copied to the volatile memory locations during power-up.

8. A storage device as recited in claim 6 wherein the old/new flags stored in the one or more nonvolatile memory devices which correlate to the physical block addresses of the plurality of nonvolatile data blocks are copied to the volatile memory locations during system reset.

9. A storage device as recited in claim 1 wherein each logical block address is stored with one of the data blocks in the one or more nonvolatile memory devices.

10. A storage device as recited in claim 9 wherein the logical block addresses in the one or more nonvolatile memory devices which correlate to the physical block addresses of the plurality of nonvolatile data blocks are utilized in copying the status information to the volatile memory locations during power-up.

Assignments (8)
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
MERGER Recorded Oct 12, 2007
From: LEXAR MEDIA, INC.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 019955/0058 →
MERGER Recorded Aug 17, 2007
From: LEXAR MEDIA, INC.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 019704/0571 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jun 29, 2004
From: ESTAKHRI, PETRO; ASSAR, MAHMUD
To: LEXAR MEDIA, INC.
Reel/Frame 014813/0566 →