Patent Assignment
Reel/Frame 019704/0571
Merger
Recorded: 2007-08-17
Pages: 105
Assignor
LEXAR MEDIA, INC.
Executed: 2006-06-21
Assignee
MICRON TECHNOLOGY, INC.
8000 SOUTH FEDERAL WAY, MS 525, BOISE, IDAHO, 83716
Covered Properties
(36)
Flash Memory Mass Storage Architecture Incorporating Wear Leveling Technique Without Using Cam Cells
Patent:
5,485,595 →
Application:
08/131,495 →
Direct Logical Block Addressing Flash Memory Mass Storage Architecture
Patent:
5,845,313 →
Application:
08/509,706 →
Automatic Voltage Detection in Multiple Voltage Applications
Patent:
5,818,781 →
Application:
08/748,867 →
Moving Sectors Within a Block of Information in a Flash Memory Mass Storage Architecture
Patent:
5,907,856 →
Application:
08/831,266 →
Identification and Verification of a Sector Within a Block of Mass Storage Flash Memory
Patent:
5,838,614 →
Application:
08/858,847 →
Moving Sequential Sectors Within a Block of Information in a Flash Memory Mass Storage Architecture
Patent:
5,930,815 →
Application:
08/946,331 →
Alignment of Cluster Address to Block Addresses Within a Semiconductor Non-Volatile Mass Storage Memory
Patent:
6,125,435 →
Application:
08/976,557 →
Increasing the Memory Performance of Flash Memory Devices by Writing Sectors Simultaneously to Multiple Flash Memory Devices
Patent:
6,081,878 →
Application:
09/030,697 →
Flash Memory Leveling Architecture Having No External Latch
Patent:
6,040,997 →
Application:
09/047,798 →
Direct Logical Block Addressing Flash Memory Mass Storage Architecture
Patent:
5,924,113 →
Application:
09/087,720 →
Method and Apparatus for Performing Erase Operations Transparent to a Solid State Storage System
Patent:
5,953,737 →
Application:
09/111,414 →
Identification and Verification of a Sector Within a Block of Mass Storage Flash Memory
Patent:
6,128,695 →
Application:
09/156,951 →
Moving Sectors Within a Block of Information in a Flash Memory Mass Storage Architecture
Patent:
6,145,051 →
Application:
09/264,340 →
Space Management for Managing High Capacity Nonvolatile Memory
Patent:
6,034,897 →
Application:
09/283,728 →
Direct Logical Block Addressing Flash Memory Mass Storage Architecture
Patent:
6,115,785 →
Application:
09/311,045 →
Method and Apparatus for Decreasing Block Write Operation Times Performed on Nonvolatile Memory
Patent:
6,122,195 →
Application:
09/330,278 →
Organization of Blocks Within a Nonvolatile Memory Unit to Effectively Decrease Sector Write Operation Time
Patent:
6,141,249 →
Application:
09/389,994 →
Data Pipelining Method and Apparatus for Memory Control Circuit
Patent:
6,374,337 →
Application:
09/440,986 →
Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices
Patent:
6,202,138 →
Application:
09/487,865 →
Space management for managing high capacity nonvolatile memory
Patent:
6,134,151 →
Application:
09/519,226 →
Identification and verification of a sector within a block of mass storage flash memory
Patent:
6,223,308 →
Application:
09/520,903 →
Method and apparatus for decreasing block write operation times performed on nonvolatile memory
Patent:
6,151,247 →
Application:
09/520,904 →
Increasing the memory performance of flash memory devices by writing sectors simultaneously to multiple flash memory devices
Patent:
6,172,906 →
Application:
09/521,419 →
Direct logical block addressing flash memory mass storage architecture
Patent:
6,230,234 →
Application:
09/521,420 →
Nonvolatile memory using flexible erasing methods and method and system for using same
Patent:
6,411,546 →
Application:
09/565,517 →
Space management for managing high capacity nonvolatile memory
Patent:
6,262,918 →
Application:
09/610,545 →
Moving Sectors Within a Block of Information in a Flash Memory Mass Storage Architecture
Patent:
6,978,342 →
Application:
09/620,544 →
Increasing the Memory Performance of Flash Memory Devices by Writing Sectors Simultaneously to Multiple Flash Memory Devices
Patent:
6,397,314 →
Application:
09/705,474 →
Identification and Verification of a Sector Within a Block of Mass Storage Flash Memory
Direct Logical Block Addressing Flash Memory Mass Storage Architecture
Increasing the Memory Performance of Flash Memory Devices by Writing Sectors Simultaneously to Multiple Flash Memory Devices
Patent:
6,757,800 →
Application:
10/071,972 →
Method and Apparatus for Memory Control Circuit
Patent:
6,801,979 →
Application:
10/077,647 →
Block Management for Mass Storage
Patent:
6,567,307 →
Application:
10/086,462 →
Increasing the Memory Performance of Flash Memory Devices by Writing Sectors Simultaneously to Multiple Flash Memory Devices
Patent:
6,728,851 →
Application:
10/152,969 →
Nonvolatile Memory Using Flexible Erasing Methods and Method and System for Using Same
Patent:
6,587,382 →
Application:
10/175,928 →
Method and Apparatus for Memory Control Circuit
Related Assignments
(17)
Other recorded transfers of the patents in this record — the chain of ownership.
Security Agreement
Aug 29, 1996
From: CIRRUS LOGIC, INC.
To: BANK OF AMERICA NATIONAL TRUST & SAVINGS ASSOCIATION AS AGENT
Reel/Frame 008113/0001 →
Assignment of Assignor's Interest
Jun 11, 1999
From: ESTAKHRI, PETRO; IMAN, BERHANU
To: LEXAR MEDIA, INC.
Reel/Frame 010612/0804 →
Assignment of Assignor's Interest
Sep 13, 1999
From: ESTAKHRI, PETRO; IMAN, BERHANU
To: LEXAR MEDIA, INC.
Reel/Frame 010222/0516 →
Assignment of Assignor's Interest
Nov 16, 1999
From: ESTAKHRI, PETRO
To: LEXAR MEDIA, INC.
Reel/Frame 010402/0245 →
Assignment of Assignor's Interest
Mar 6, 2000
From: ESTAKHRL, PETRO; IMAN, BERHANU; GUO, MIN
To: LEXAR MEDIA, INC.
Reel/Frame 010607/0935 →
Assignment of Assignor's Interest
Mar 7, 2000
From: ESTAKHRI, PETRO; IMAN, BERHANU
To: LEXAR MEDIA, INC
Reel/Frame 010612/0719 →
Assignment of Assignor's Interest
Mar 8, 2000
From: ESTAKHRI, PETRO; IMAN, BERHANU
To: LEXAR MICROSYSTEMS, INC.
Reel/Frame 010642/0636 →
Assignment of Assignor's Interest
Mar 8, 2000
From: ESTAKHRI, PETRO; ASSAR, MAMUD
To: LEXAR MEDIA, INC.
Reel/Frame 010631/0375 →
Termination of Security Interest
Mar 15, 2006
From: TU, JOHN; SUN, DAVID
To: LEXAR MEDIA, INC.; LEXAR MICROSYSTEMS, INC.
Reel/Frame 017422/0871 →
Termination of Security Agreement
Mar 15, 2006
From: TOSHIBA AMERICA ELECTRONIC COMPONENTS, INC.
To: LEXAR MEDIA, INC.
Reel/Frame 017336/0712 →
Release of Security Interest
May 15, 2006
From: JP MORGAN CHASE BANK, N.A. (FORMERLY THE CHASE MANHATTAN BANK)
To: LEXAR MEDIA, INC.
Reel/Frame 017626/0820 →
Merger
Oct 12, 2007
From: LEXAR MEDIA, INC.
To: MICRON TECHNOLOGY, INC.
Reel/Frame 019955/0058 →
Security Interest
May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
Patent Security Agreement
Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
Corrective Assignment to Correct the Replace Erroneously Filed Patent #7358718 with the Correct Patent #7358178 Previously Recorded on Reel 038669 Frame 0001. Assignor(S) Hereby Confirms the Security Interest.
Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
Release of Security Interest
Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
Release of Security Interest
Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →