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App. No. 09/855,243 · Confirmation No. 9010

Semiconductor memory and address controlling method thereof

Inventor: Masatsugu Nakamura
Abandoned -- Failure to Respond to an Office Action View Publication ↗
⬇ PDF
 Code Description Pages PDF
2001-05-15 TRNA Transmittal of New Application 6 View
2001-05-15 SPEC Specification 19 View
2001-05-15 CLM Claims 12 View
2001-05-15 ABST Abstract 1 View
2001-05-15 DRW Drawings-only black and white line drawings 6 View
2001-05-15 OATH Oath or Declaration filed 3 View
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Quick Facts
App. No.
09/855,243
Filed
2001-05-15
Pub. No.
US20020023193A1
Art Unit
2187