Granted Patent
Utility
US 6,593,535
· Confirmation No. 1740
DIRECT INNER LAYER INTERCONNECT FOR A HIGH SPEED PRINTED CIRCUIT BOARD
Inventor:
Mark W. Gailus
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⬇ PDF
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2001-06-26 | TRNA |
Transmittal of New Application | 2 | View | |
| 2001-06-26 | SPEC |
Specification | 23 | View | |
| 2001-06-26 | CLM |
Claims | 5 | View | |
| 2001-06-26 | ABST |
Abstract | 1 | View | |
| 2001-06-26 | DRW |
Drawings-only black and white line drawings | 6 | View | |
| 2001-06-26 | OATH |
Oath or Declaration filed | 3 | View |
Inventors
Mark W. Gailus
Somerville, MA
Attorneys & Agents of Record
Classification
USPC
174/262
Prosecution
- Examiner
- PATEL, ISHWARBHAI B
- Art Unit
- 2827
- Customer No.
- 27557
- Docket No.
- TER-015PUS
- Confirmation No.
- 1740
Publication
- Pub. No.
- US20020195271A1
- Pub. Date
- 2002-12-26
Patent Term Adjustment
0days
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Quick Facts
- Patent No.
- US 6,593,535
- App. No.
- 09/892,045
- Filed
- 2001-06-26
- Granted
- 2003-07-15
- Pub. No.
- US20020195271A1
- Examiner
- PATEL, ISHWARBHAI B
- Art Unit
- 2827
- PTA
- 0 days
External Links