Error correction coding and decoding in a solid-state storage device
View Patent ↗A magnetoresistive solid-state storage device (MRAM) employs error correction coding (ECC) to form ECC encoded stored data. In a read operation, parametric values are obtained from storage cells 16 of the device and compared to ranges to establish logical bit values, together with erasure information. The erasure information identifies symbols 206 in a block of ECC encoded data 204 which, from the parametric evaluation, are suspected to be affected by physical failures of the storage cells 16 . Where the position of suspected failed symbols 206 is known from this erasure information, the ability of a decoder 22 to perform ECC decoding is substantially enhanced.
1. A method for error correction decoding ECC encoded data stored in a solid-state storage device having a plurality of storage cells, comprising the steps of:
obtaining parametric values from a set of the storage cells;
generating a block of stored ECC encoded data, using the obtained parametric values;
forming erasure information for the block of stored ECC encoded data, using the obtained parametric values; and
error correction decoding the block of stored ECC encoded data with reference to the erasure information.
2. The method of claim 1 , comprising reading the set of storage cells.
3. The method of claim 1 , comprising generating logical values with respect to the obtained parametric values.
4. The method of claim 1 , comprising comparing the obtained parametric values against a range.
5. The method of claim 1 , wherein the device is a magnetoresistive solid-state storage device.
6. The method of claim 5 , wherein the obtained parametric values include a resistance value or a time value for each of the set of storage cells, the obtained parametric values being derived from a sense current.
7. The method of claim 1 , wherein the forming step comprises comparing the obtained parametric values against a range to infer physical failures amongst the storage cells.
8. The method of claim 1 , wherein the generating step comprises generating logical values for a plurality of symbols of the block of encoded data, and the forming step comprises identifying one or more of the symbols as an erasure.
9. The method of claim 8 , wherein the erasure information identifies one or more symbols in the block of encoded data where a logical value could not be obtained from the parametric values.
10. The method of claim 8 , wherein the erasure information identifies one or more symbols in the block of encoded data where a logical value obtained from the parametric values is considered to be unreliable.
11. The method of claim 8 , wherein the decoding step comprises identifying the location of zero or more failed symbols in the block of encoded data, using the erasure information; and replacing each identified failed symbol with a calculated correct value.
12. The method of claim 1 , wherein the decoding step comprises identifying the location of zero or more errors in the block of encoded data, with reference to the erasure information; and replacing each identified error with a calculated correct value.
13. The method of claim 1 , comprising the step of writing back corrected encoded data to the storage cells.
14. The method of claim 13 , wherein the write-back step comprises selectively writing back corrected encoded data to the storage cells, with reference to the erasure information.
15. The method of claim 14 , wherein the write-back step comprises selectively not writing back corrected encoded data to storage cells which are determined as affected by physical failures.
16. The method of claim 1 , further comprising the steps of:
encoding a logical unit of original information to form a block of ECC encoded data; and
storing the block of ECC encoded data in the array of storage cells;
wherein the decoding step attempts to recover the logical unit of original information from the stored block of ECC encoded data.
17. A solid state storage device, comprising:
at least one array of storage cells; and
an array controller for obtaining parametric values from a set of the storage cells and generating a block of stored ECC encoded data using the obtained parametric values, including forming erasure information for the block of stored ECC encoded data using the obtained parametric values; and
an ECC decoding unit for decoding the block of stored ECC encoded data with reference to the erasure information.
18. The device of claim 17 , wherein the device is a magnetoresistive solid-state storage device.
19. A magnetoresistive solid-state storage device, comprising:
at least one array of magnetoresistive storage cells;
an ECC coding unit for receiving original information and forming a block of ECC encoded data;
a controller for storing the block of ECC encoded data in the array of storage cells;
an array controller for obtaining parametric values from a set of the storage cells and generating a block of stored ECC encoded data using the obtained parametric values, including forming erasure information for the block of stored ECC encoded data using the obtained parametric values; and
an ECC decoding unit for decoding the block of stored ECC encoded data with reference to the erasure information.
20. An apparatus incorporating a magnetoresistive storage device according to claim 19 .