IP Library Assignment 019733/0063
Patent Assignment
Reel/Frame 019733/0063

Assignment of Assignor's Interest

Recorded: 2007-08-22 Received: 2007-08-22 Pages: 33
Assignor
Assignee
SAMSUNG ELECTRONICS CO., LTD.
416 MAETAN-DONG, YEONGTONG-GU, SUWON-SI, GYEONGGI-DO, KRX, KOREA, REPUBLIC OF
Covered Properties (45)
Method of Fabricating a Polarizing Layer on an Interface
Application: 11/053,381 →
Magnetic Memory Having a Calibration System
Application: 10/690,249 →
Magnetic Memory
Application: 10/679,564 →
Data Storage Device and Method of Forming the Same
Application: 10/657,385 →
Magnetic Memory Device
Application: 10/612,676 →
Magnetic Memory Device
Application: 10/601,895 →
Magnetic Memory with Structure Providing Reduced Coercivity
Application: 10/462,979 →
Magnetic Memory Cell Sensing with First and Second Currents
Application: 10/452,755 →
Magnetic Shielding for Magnetic Random Access Memory Card
Application: 10/358,770 →
Magnetic Memory Device and Methods for Making Same
Application: 10/283,559 →
Systems and Methods for Reducing the Effect of Noise While Reading Data from Memory
Application: 10/273,623 →
Error Detection System for an Information Storage Device
Application: 10/264,588 →
Magnetic Memory Devices Having Multiple Bits Per Memory Cell
Application: 10/235,045 →
Read Operations on Multi-Bit Memory Cells in Resistive Cross Point Arrays
Application: 10/234,511 →
Magnetic Memory Which Compares First Memory Cell Data Bits and Second Data Bits
Application: 10/223,490 →
Systems and Methods for Reducing the Effect of Noise While Reading Data in Series from Memory
Application: 10/218,892 →
Magnetic Memory Device Having Improved Switching Characteristics
Application: 10/205,531 →
Magnetic Memory Having a Temperature Compensated Write Circuit
Application: 10/194,767 →
Magnetic Random Access Memory with Reduced Parasitic Currents
Application: 10/146,201 →
Systems and Methods for Communicating with Memory Blocks
Application: 10/145,834 →
Minimizing Errors in a Magnetoresistive Solid-State Storage Device
Application: 10/138,074 →
Conductor Structure for a Magnetic Memory
Application: 10/132,998 →
Magnetic Shielding for Mram Devices
Application: 10/125,095 →
Write Pulse Circuit for a Magnetic Memory
Application: 10/096,542 →
Verifying Data in a Data Storage Device
Application: 10/092,111 →
Magnetic Memory Using Reverse Magnetic Field to Improve Half-Select Margin
Application: 10/090,246 →
In-Plane Toroidal Memory Cell with Vertically Stepped Conductors
Application: 10/080,847 →
System and Method for Determining the Logic State of a Memory Cell in a Magnetic Tunnel Junction Memory Device
Application: 10/055,299 →
Storage and Retrieval for Resistance-Based Memory Devices
Application: 10/050,668 →
Stylus Based Input Devices Utilizing a Magnetic Random Access Momory Array
Application: 10/038,485 →
Integrated Digitizing Tablet and Display Apparatus and Method of Operation
Application: 10/038,466 →
Magnetic Memory Device Having Soft Reference Layer
Application: 10/029,694 →
Method and Article for Concentrating Fields at Sense Layers
Application: 10/005,423 →
3-D-Memory Device for Large Storage Capacity
Application: 09/984,934 →
Spin Dependent Tunneling Junctions Including Ferromagnetic Layers Having Flattened Peaks
Application: 09/981,277 →
High Density Memory Sense Amplifier
Application: 09/976,304 →
Magneto-Resistive Device Including Soft Synthetic Ferrimagnet Reference Layer
Application: 09/963,933 →
Multi-Bit Magnetic Memory Cells
Application: 09/925,755 →
Over-Temperature Warning Device
Application: 09/921,145 →
Data Storage Method for Use in a Magnetoresistive Solid-State Storage Device
Application: 09/915,195 →
Error Correction Coding and Decoding in a Solid-State Storage Device
Application: 09/915,194 →
Memory Device with Short Read Time
Application: 09/910,823 →
Reference Layer Structure in a Magnetic Storage Cell
Application: 09/871,395 →
Solid-State Memory with Magnetic Storage Cells
Application: 09/871,387 →
Method of Writing to a Memory Array Using Clear Enable and Column Clear Signals
Application: 09/845,387 →