Efficient high density voice processor
View Patent ↗A circuit and method are presented for signal processing and routing of digital voice telephony signals, using a specialized high-density integrated circuit voice processor. The voice processor performs several essential functions required for telephony processing, including echo cancellation, protocol conversion, and dynamic range compression/expansion. These functions are traditionally performed by multiple circuits or modules. By combining these capabilities in a single device, power and circuit board area requirements are reduced. The embodiment of the circuit and method disclosed herein include novel implementations of a time-slot interchange circuit and a telephony signaling circuit. Both of these circuits are designed to minimize demands on the signal processing engines incorporated within the voice processor, and account for very little of the on-chip circuitry.
1. A telephony signaling circuit, comprising:
a comparison register adapted to store first signal bits contained within a first data sequence received over a voice channel; and
a comparator adapted to compare the first signal bits stored in the comparison register against second signal bits contained within a second data sequence received over the voice channel and, if the first signal bits differ from the second signal bits, to replace the first signal bits stored in the comparison register with the second signal bits and to notify a digital signal processor coupled to the comparator of the replacement.
2. The telephony signaling circuit as recited in claim 1 , further comprising a modification register adapted to store third signal bits, and a data modifier adapted to place the stored third signal bits into a third data sequence and to subsequently transmit the third data sequence over the voice channel.
3. The telephony signaling circuit as recited in claim 2 , further comprising multiple voice channels, such that each voice channel is adapted to receive a plurality of data sequences, each of which contains a unique combination of signal bits, and wherein one of a plurality of comparison registers, data comparators, modification registers and data modifiers is associated with each voice channel.
4. The telephony signaling circuit as recited in claim 3 , wherein in response to being notified by the data comparator of the replacement of the signal bits in the comparison register, the DSP changes, during use, the status of the respective voice channel.
5. The telephony signaling circuit as recited in claim 3 , wherein the DSP is configured to change the third signal bits stored in the modification register and cause the data modifier to place the changed third signal bits into a data sequence and to subsequently transmit the data sequence over the voice channel.
6. The telephony signaling circuit as recited in claim 3 , wherein the received and transmitted data sequences comprise time division multiplexed voice data, as typically used for telephone communication.
7. The telephony signaling circuit as recited in claim 3 , further comprising a packet control processor (PCP) adapted to receive notification from the comparator of a change in the first signal bits stored in the comparison register, and to change third signal bits stored in the modification register.
8. The telephony signaling circuit as recited in claim 7 , wherein receiving notification from the comparator comprises receiving a hardware interrupt issued by the comparator.
9. A method for detecting telephony signals, comprising:
storing in a comparison register first signal bits contained within a first data sequence received over an input voice channel;
comparing the first signal bits against second signal bits contained in a second data sequence received over the input voice channel; and
if the first signal bits differ from the second signal bits, replacing the first signal bits with the second signal bits.
10. The method as recited in claim 9 , further comprising storing third signal bits in a modification register, using a data modifier to place the stored third signal bits into a third data sequence and subsequently transmitting the third data sequence over an output voice channel.
11. The method as recited in claim 10 , further comprising the processor, upon being notified that the first signal bits differ from the second signal bits, changing the third signal bits stored in the modification register and causing the data modifier to place the changed third signal bits into the third data sequence, and subsequently transmit the third data sequence over the output voice channel.
12. The method as recited in claim 9 , further comprising multiple input voice channels, such that each input voice channel is adapted to receive a plurality of data sequences, each of which contains a unique combination of signal bits, and wherein one of a plurality of comparison registers, data comparators, modification registers and data modifiers is associated with each input voice channel.
13. The method as recited in claim 9 , further comprising multiple output voice channels, such that each output voice channel is adapted to transmit a data sequence containing a unique combination of signal bits, and wherein one of a plurality of modification registers and data modifiers is associated with each output voice channel.
14. The method as recited in claim 9 , further comprising notifying a processor if the first signal bits differ from the second signal bits.