IP Library Granted Patent US 7,013,028
Granted Patent B2
US 7,013,028 · App. 09/920,937 · Granted Mar 14, 2006

Advanced schematic editor

Assignee: Semiconductor Insights Inc.
View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,013,028
App. No.
09/920,937
Granted
Mar 14, 2006
Kind
B2
Abstract

An editor in a computer system for editing an schematic having a number of pages. The editor may cut a selected portion of the schematic from any one of the schematic pages, paste the cut portion of the schematic onto any one of the schematic pages, and connect nets located on the same schematic page. The editor may search for objects such as signal labels and cells within the schematic netlist as well as other editing functions. Further a navigator is provided for interactively viewing netlist data from a high level schematic where the data includes schematic page numbers, cell names, nets, signal labels and segments. The project viewer software and project schematic netlist data may be contained in a computer-readable medium. The project viewer software controls output schematic images and enables a user to view, trace and search objects throughout the project netlist data.

Claims (25)

1. An editor in a computer system for a schematic having a number of pages comprising:

a module for cutting a selected portion of the schematic from any one of the schematic pages, each page displaying a viewable area of the schematic at a given time within the editor;

a module for pasting the cut portion of the schematic onto any one of the schematic pages;

a module for connecting nets having the same label located on the same schematic page.

2. An editor as claimed in claim 1 which further includes a module for searching for objects within the schematic netlist.

3. An editor as claimed in claim 2 wherein the object is a signal label.

4. An editor as claimed in claim 3 wherein the module provides a list of signal labels found on a preselected schematic page.

5. An editor as claimed in claim 3 wherein the module provides a list of pages on which the signal label is found.

6. An editor as claimed in claim 2 wherein the object is a cell.

7. An editor as claimed in claim 6 wherein the module provides a list of cells found on a preselected schematic page.

8. An editor as claimed in claim 6 wherein the cell may be searched using one of the following: cell coordinates, name label or attributes.

9. An editor as claimed in claim 6 wherein the module provides a list of schematic pages on which the cell is found.

10. An editor as claimed in claim 1 which further includes a module for eliminating extra pins or segment endings on a schematic.

11. An editor as claimed in claim 1 which further includes a module for rendering invisible the labels on a current active page or on all of the schematic pages.

12. An editor as claimed in claim 1 which further includes a module for adding IN/OUT elements to pin segments.

13. An editor as claimed in claim 1 which further includes a module for cutting a net on a schematic and providing a signal label to the two cut ends of the net.

14. A computer-readable medium containing project viewer software and project schematic netlist data including schematic page numbers, cell names, nets, signal labels and segments,

wherein the project viewer software is configured to edit a schematic having a number of pages.

15. A computer-readable medium as claimed in claim 14 wherein the project viewer software controls output schematic symbols and enables a user to view, trace and search objects throughout the project netlist data.

16. A process in a computer system as claimed in claim 14 wherein the hierarchal structure is organized by schematic pages.

17. A process in a computer system for interactively viewing netlist data from a high level schematic including schematic page numbers, cell names, nets, signal labels and segments, the viewing process comprising:

generating the hierarchal structure of the schematic on one pane of a split screen;

generating a selected part of the schematic on another pane of the split screen;

generating a list of cell names in a window on the screen; and

generating a list of signal labels in a window on the screen.

Assignments (5)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2021
From: STELLUS CAPITAL INVESTMENT CORPORATION, AS ADMINISTRATIVE AGENT
To: TECHINSIGHTS INC.
Reel/Frame 058096/0558 →
SECURITY INTEREST Recorded Nov 10, 2021
From: TECHINSIGHTS INC.; VLSI RESEARCH INC.
To: CAPITAL ONE, NATIONAL ASSOCIATION
Reel/Frame 058096/0721 →
NOTICE OF GRANT OF SECURITY INTEREST IN PATENTS Recorded Aug 16, 2017
From: TECHINSIGHTS INC.
To: STELLUS CAPITAL INVESTMENT CORPORATION, AS ADMINISTRATIVE AGENT
Reel/Frame 043571/0385 →
CHANGE OF NAME Recorded Oct 9, 2014
From: SEMICONDUCTOR INSIGHTS INC.
To: TECHINSIGHTS INC.
Reel/Frame 033941/0692 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 3, 2001
From: GONT, VAL; ABT, JASON; LAM, LARRY
To: SEMICONDUCTOR INSIGHTS INC.
Reel/Frame 012056/0846 →
Priority Claims (1)
CA 2315548 · Aug 9, 2000 · national
Continuity (1)
Related Publication 20020018583A1 · Feb 14, 2002