IP Library Granted Patent US 6,845,441
Granted Patent B2
US 6,845,441 · App. 09/927,398 · Granted Jan 18, 2005

User initiated microcode modification

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Quick Facts
Patent No.
US 6,845,441
App. No.
09/927,398
Granted
Jan 18, 2005
Kind
B2
Abstract

An instruction decoding unit in a microcomputer is disclosed having an instruction word capable of being selected by a user to conveniently produce application software while maintaining security. The decoding unit in a microcomputer includes an instruction register for storing instructions fetched from a memory, an instruction decoder for decoding instruction codes of the instructions stored in the instruction register and for designating micro-instructions to be executed, a micro-ROM for outputting a series of the micro-instructions designated by the instruction decoder, and a user instruction selector for selecting or changing the micro-instructions of the micro-ROM in response to user's selection so as to change the operation of an instruction word.

Claims (12)

1. An instruction decoding unit in a microcomputer comprising:

an instruction register storing instructions fetched from a memory;

an instruction decoder decoding instruction codes of the instructions stored in the instruction register and designating micro-instructions to be executed;

an instruction code selector, connected between the instruction register and the instruction decoder, allowing a user to select a signal corresponding to at least one of a plurality of instruction maps wherein said instruction code selector is operable to encrypt instruction code;

a micro-ROM outputting a series of the micro-instructions designated by the instruction decoder; and

a user instruction selector selecting or changing the micro-instructions of the micro-ROM in response to a selection by a user so as to change the operation of an instruction word.

2. The instruction decoding unit in a microcomputer as claimed in claim 1 , wherein the user instruction selector selects the instructions using a mask option or a particular register.

3. The instruction decoding unit in a microcomputer as claimed in claim 1 , wherein the plurality of instruction maps are two or more.

4. An instruction decoding unit in a microcomputer, comprising:

an instruction code selector generating encrypted instructions by manipulating received instructions;

a decoder decoding instructions corresponding to encrypted instructions received from the instruction code selector; and

a user instruction selector selecting or changing the instructions decoded by the decoder in response to selection by a user.

Assignments (3)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 29, 2006
From: MAGNACHIP SEMICONDUCTOR, LTD.
To: ABOV SEMICONDUCTOR CO., LTD.
Reel/Frame 017379/0378 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 10, 2005
From: HYNIX SEMICONDUCTOR, INC.
To: MAGNACHIP SEMICONDUCTOR, LTD.
Reel/Frame 016216/0649 →
CHANGE OF NAME Recorded Oct 12, 2004
From: LG SEMICON CO., LTD.
To: HYNIX SEMICONDUCTOR INC.
Reel/Frame 015246/0634 →