System and method for indentifying dummy features on a mask layer
View Patent ↗Automated techniques for identifying dummy/main features on a mask layer are provided. In a multiple mask layer technique, the definition of a dummy/main feature can be based on connectivity information or functional association information. In a geometry technique, the definition of a dummy/main feature can be based on a feature size, a feature shape, a pattern of features, or a proximity of a feature to a neighboring feature. In one embodiment, multiple definitions and multiple techniques can be used.
1. A method of distinguishing a dummy feature from a main feature, the method comprising:
selecting a mask layer;
providing a technique to identify the dummy feature on the mask layer generated with a one-level file; and
applying the technique to the selected mask layer.
2. The method of claim 1 , wherein the technique includes determining at least one of a size of a feature, a shape of a feature, a pattern from multiple features, and a proximity of a feature to another feature.
3. The method of claim 1 , further including using information from at least one other mask layer to use in the technique.
4. The method of claim 3 , wherein the information includes at least one of connectivity between the selected mask layer and the at least one other mask layer, and a functional association between the selected mask layer and the at least one other mask layer.
5. The method of claim 1 , wherein the method is performed during at least one of optical proximity correction, placement of phase-shifting structures, mask fabrication, mask inspection, and mask repair.
6. An automated method of processing a mask layer for manufacturing an integrated circuit, the automated method comprising:
identifying a plurality of main features and at least one dummy feature in the mask layer generated with a one-level file; and
providing the processing only to the plurality of main features.
7. The method of claim 6 , wherein processing includes at least one of correcting for optical proximity, providing phase-shifting structures, and using a user input regarding at least one of a main feature and a dummy feature.
8. The method of claim 6 , wherein processing is performed during at least one of fabrication of a mask, inspection of a mask, and repair of a mask.
9. The method of claim 6 , wherein identifying includes applying at least one of a multiple layer technique and a geometry technique.
10. The method of claim 6 , wherein identifying includes determining a size of a feature on the mask layer, a shape of a feature on the mask layer, a pattern from multiple features on the mask layer, and a proximity of a feature to another feature on the mask layer.
11. The method of claim 6 , wherein identifying includes using information from at least one other mask layer for the integrated circuit.
12. The method of claim 11 , wherein the information includes at least one of connectivity between the mask layer and the at least one other mask layer, and a functional association between the mask layer and the at least one other mask layer.
13. A method of inspecting a mask for defects, the mask including a plurality of features, the method comprising:
reading a mask data preparation format file, the mask data preparation file being a one-level file;
identifying dummy versus non-dummy features using the mask data preparation format file; and
inspecting only non-dummy features.
14. The method of claim 13 , wherein identifying includes determining at least one of a size of a feature, a shape of a feature, a pattern from multiple features, and a proximity of a feature to another feature.
15. The method of claim 13 , wherein identifying includes using information from at least one other mask.
16. The method of claim 15 , wherein the information includes at least one of connectivity and a functional association between mask layers.
17. The method of claim 13 , further including marking only the non-dummy features for repair.
18. A method of conserving resources in a computer system during optical proximity correction (OPC) of a layout of an integrated circuit (IC), the method comprising:
identifying dummy versus non-dummy features from the layout, wherein dummy and non-dummy features are not separated in data representation; and
expending resources for OPC only on non-dummy features.
19. The method of claim 18 , wherein identifying includes determining at least one of a connectivity of features, a functional association of features, and a geometrical description of features.