High aspect ratio contact structure with reduced silicon consumption
View Patent ↗A high aspect ratio contact structure formed over a junction region in a silicon substrate comprises a titanium interspersed with titanium silicide layer that is deposited in the contact opening and directly contacts an upper surface of the substrate. Silicon-doping of CVD titanium, from the addition of SiH 4 during deposition, reduces consumption of substrate silicon during the subsequent silicidation reaction in which the titanium reacts with silicon to form a titanium silicide layer that provides low resistance electrical contacts between the junction region and the silicon substrate. The contact structure further comprises a titanium nitride contact fill that is deposited in the contact opening and fills substantially the entire contact opening.
1. An integrated circuit, comprising:
a silicon substrate;
an insulating layer formed on an upper surface of the substrate wherein a contact opening is formed in the insulating layer, wherein the contact opening extends from an upper surface of the insulating layer to the upper surface of the substrate;
a conductive contact deposited in the opening in a manner such that the conductive contact directly contacts the upper surface of the substrate, wherein the conductive contact comprises a titanium layer interspersed with titanium silicide, wherein a substantial portion of the titanium silicide is interspersed in the titanium prior to the depositing in the opening such that the substantial portion of titanium silicide reduces the total amount of silicon from the substrate consumed in forming titanium silicide in the conductive contact;
a conductive contact fill formed on an upper surface of the conductive contact, wherein the conductive contact fill comprises titanium nitride.
2. The integrated circuit of claim 1 , wherein the titanium layer interspersed with titanium silicide is approximately 50 Å to 150 Å thick.
3. The integrated circuit of claim 1 , wherein the titanium layer interspersed with titanium silicide comprises approximately 10% silicon.
4. The integrated circuit of claim 1 , wherein the contact opening has an aspect ratio of at least 10:1.
5. The integrated circuit of claim 1 , wherein the upper surface of the substrate comprises a junction region.
6. The integrated circuit of claim 5 , wherein the junction region is less than about 1 μm deep.
7. The integrated circuit of claim 5 , wherein the titanium silicide in the titanium layer provides low resistance electrical contacts between the junction region and the silicon substrate.
8. The integrated circuit of claim 1 , wherein the titanium rich titanium silicide layer is deposited over the upper surface of the insulating layer.
9. The integrated circuit of claim 1 , wherein the titanium nitride contact fill comprises a TiCl 4 based titanium nitride.
10. A contact structure having a contact opening formed over a junction region in a silicon substrate, comprising:
a conductive contact layer comprising titanium interspersed with titanium silicide, wherein the conductive contact layer is deposited directly on an upper surface of the silicon substrate over the junction region, wherein the titanium silicide in the conductive contact layer reduces consumption of silicon from the junction region during a silicidation reaction between silicon in the substrate and titanium in the conductive contact layer;
a diffusion barrier layer formed on an upper surface of the conductive contact layer;
a contact fill formed on an upper surface of the diffusion barrier layer, wherein the contact fill comprises titanium nitride, wherein the titanium nitride fills substantially the entire contact opening.
11. The contact structure of claim 10 , wherein the junction region is less than about 1 μm deep.
12. The contact structure of claim 11 , wherein the diffusion barrier layer comprises titanium nitride.
13. The contact structure of claim 11 , wherein the titanium interspersed with titanium silicide layer is deposited using a PECVD process.
14. The contact structure of claim 13 , wherein the titanium interspersed with titanium silicide layer is deposited using a gas mixture comprising TiCl 4 , Ar, H 2 , He, and SiH 4 .
15. The contact structure of claim 14 , wherein the titanium interspersed with titanium silicide layer is deposited at a process temperature of about 650° C., RF power of about 400 W, and pressure of about 4 Torr.
16. The contact structure of claim 15 , wherein the titanium interspersed with titanium silicide layer is deposited by adding about 10 sccm of SiH 4 at about 400 W.
17. The contact structure of claim 11 , wherein the titanium nitride contact fill is deposited using a CVD process.
18. The contact structure of claim 10 , wherein the titanium nitride contact fill is deposited using TiCl 4 and NH 3 precursors.