Method for fabrication of field-effect transistor to reduce defects at MOS interfaces formed at low temperature
View Patent ↗A method for the fabrication of a field-effect transistor wherein after forming a semiconductor layer serving as an active layer on a substrate, the substrate temperature is set at no higher than 100° C., a gate insulating film is formed on the semiconductor layer. Then, the gate insulating film is heat treated in an atmosphere containing water. By heat treating in the atmosphere containing water, OH bonds in the vicinity of the insulating film interface are reduced and, therefore, the CV characteristic thereof is improved.
1. A method for the fabrication of a field-effect transistor comprising the steps of:
forming a semiconductor layer serving as an active layer on a substrate;
setting the substrate temperature at no higher than 100° C. and forming a gate insulating film on said semiconductor layer, such that interface level density between the semiconductor layer and the gate insulating film is no greater than 10 11 cm −2 eV −1 ; and
heat treating said gate insulating film in an atmosphere containing water.
2. The method for the fabrication of a field-effect transistor according to claim 1 , wherein heat treatment of said gate insulating film is conducted at a temperature of no less than 100° C.
3. The method for the fabrication of a field-effect transistor according to claim 1 , wherein the formation of said gate insulating film is conducted while heating of said substrate is being prohibited.
4. The method for the fabrication of a field-effect transistor according to claim 1 , wherein the formation of said gate insulating film is conducted while said substrate is being cooled to a temperature of no higher than room temperature.
5. The method for the fabrication of a field-effect transistor according to claim 1 , wherein said gate insulating film is formed by a plasma CVD method.
6. The method for the fabrication of a field-effect transistor according to claim 1 , wherein said gate insulating film is formed by a microwave plasma CVD method.
7. A method for the fabrication of a field-effect transistor comprising the steps of:
forming a semiconductor layer serving as an active layer on a substrate;
setting the substrate temperature at no higher than 100° C. and forming a first-stage gate insulating film on said semiconductor layer, such that interface level density between the semiconductor layer and the gate insulating film is no greater than 10 11 cm −2 eV −1 ; and
selling said substrate temperature at no less than 100° C. and forming a second-stage gate insulating film.
8. The method for the fabrication of a field-effect transistor according to claim 7 , further comprising a step of heat treating said first-stage gate insulating film in an atmosphere containing water after the formation of said first-stage gate insulating film.
9. The method for the fabrication of a field-effect transistor according to claim 8 , wherein heat treating of said gate insulating film is conducted at a temperature of no less than 100° C.
10. The method for the fabrication of a field-effect transistor according to claim 7 , wherein the formation of said first-stage gate insulating film is conducted while heating of said substrate is being prohibited.
11. The method for the fabrication of a field-effect transistor according to claim 7 , wherein the formation of said first-stage gate insulating film is conducted while said substrate is being cooled to a temperature of no higher than room temperature.
12. The method for the fabrication of a field-effect transistor according to claim 7 , wherein the formation of said first-stage gate insulating film is conducted by a plasma CVD method.
13. The method for the fabrication of a field-effect transistor according to claim 7 , wherein the formation of said first-stage gate insulating film is conducted by a microwave plasma CVD method.
14. The method for the fabrication of a field-effect transistor according to claim 7 , wherein the formation of said second-stage insulating film is conducted by a plasma CVD method using TEOS gas.
15. A method for the fabrication of an electronic apparatus comprising:
forming a semiconductor layer serving as an active layer on a substrate;
setting the substrate temperature at no higher than 100° C. and forming a gate insulating film on said semiconductor layer, such that interface level density between the semiconductor layer and the gate insulating film is no greater than 10 11 cm −2 eV −1 , and
heat treating said gate insulating film in an atmosphere containing water.
16. A method for the fabrication of an electronic apparatus comprising:
forming a semiconductor layer serving as an active layer on a substrate;
setting the substrate temperature at no higher than 100° C. and forming a first-stage gate insulating film on said semiconductor layer, such that interface level density
between the semiconductor layer and the gate insulating film is no greater than 10 11 cm −2 eV −1 ; and
setting said substrate temperature at no less than 100° C. and forming a second-stage gate insulating film.