IP Library Granted Patent US 7,028,112
Granted Patent B2
US 7,028,112 · App. 09/949,172 · Granted Apr 11, 2006

Software and process for low-latency audio recording

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Quick Facts
Patent No.
US 7,028,112
App. No.
09/949,172
Granted
Apr 11, 2006
Kind
B2
Abstract

A process and software for aggressive capture of digital recording on computers, for the purpose of reducing audio latency, which includes periodic frequent polling of a recording buffer containing audio recording data and a known value, reading out data values that do not match the previously written known value, and writing over the data with the known value.

Claims (43)

1. A method for reducing latency in digital audio recording comprising the steps of:

a) polling at a polling address in a sequentially addressed recording buffer to which buffer are captured audio recording data and to which buffer a known value has been written,

b) reading out a data value at the polling address that does not match the known value previously written into the buffer,

c) writing over the non-matching data with the known value, and

d) moving to the next sequential address in the buffer or wrapping to the beginning of the buffer and repeating steps (a) to (c) using the next sequential address as the polling address,

e) wherein said step of polling is performed periodically during data transfer.

2. The method of claim 1 which further comprises, before step (a), the step of establishing the recording buffer.

3. The method of claim 2 which further comprises, before step (a), the step of requesting that audio recording data be captured to the buffer.

4. The method of claim 3 which further comprises, before step (a), the step of writing a known value into the buffer.

5. The method of claim 2 which further comprises, before step (a), the step of writing a known value into the buffer.

6. The method of claim 1 which further comprises, before step (a), the step of requesting that audio recording data be captured to the buffer.

7. The method of claim 1 which further comprises, before step (a), the step of writing a known value into the buffer.

8. A software program for reducing latency in digital audio recording that comprises instructions to a computer to perform the steps of,

a) polling at a polling address in a sequentially addressed recording buffer to which buffer are captured audio recording data and to which buffer a known value has been written,

b) reading out a data value at the polling address that does not match the known value previously written into the buffer,

c) writing over the non-matching data with the known value, and

d) moving to the next sequential address in the buffer or wrapping to the beginning of the buffer and repeating steps (a) to (c) using the next sequential address as the polling address,

e) wherein said step of polling is performed periodically during data transfer.

9. The method of claim 8 which further comprises, before step (a), the step of establishing the recording buffer.

10. The method of claim 9 which further comprises, before step (a), the step of requesting that audio recording data be captured to the buffer.

11. The method of claim 10 which further comprises, before step (a), the step of writing a known value into the buffer.

12. The method of claim 9 which further comprises, before step (a), the step of writing a known value into the buffer.

13. The method of claim 8 which further comprises, before step (a), the step of requesting that audio recording data be captured to the buffer.

14. The method of claim 8 which further comprises, before step (a), the step of writing a known value into the buffer.

15. A system for reducing latency in digital audio recording, said system comprising:

a) means for polling at a polling address in a sequentially addressed recording buffer to which buffer are captured audio recording data and to which buffer a known value has been written,

b) means for reading out a data value at the polling address that does not match the known value previously written into the buffer,

c) means for writing over the non-matching data with the known value, and

d) means for moving to the next sequential address in the buffer or wrapping to the beginning of the buffer using the next sequential address as the polling address,

e) wherein said means for polling at a polling address is a means for periodically polling at a polling address during data transfer in a sequentially addressed recording buffer to which buffer are captured audio recording data and to which buffer a known value has been written.

16. The system of claim 15 which further comprises means for establishing the recording buffer.

17. The system of claim 16 which further comprises means for requesting that audio recording data be captured to the buffer.

18. The system of claim 15 which further comprises means for requesting that audio recording data be captured to the buffer.

19. The system of claim 15 which further comprises means for writing a known value into the buffer.

20. A software program for reducing latency in digital audio recording that comprises instructions to a computer to perform the steps of,

a) polling at a polling address in a sequentially addressed recording buffer to which buffer are captured audio recording data and to which buffer a known value has been written,

b) reading out a data value at the polling address that does not match the known value previously written into the buffer to reduce latency, and

c) moving to the next sequential address in the buffer or wrapping to the beginning of the buffer and repeating steps (a) and (b) using the next sequential address as the polling address,

d) wherein said step of polling is performed periodically during data transfer.

21. The software program of claim 20 further comprising instructions to a computer to perform the step of establishing the recording buffer.

22. The software program of claim 20 further comprising instructions to a computer to perform the step of requesting that audio recording data be captured to the buffer.

23. The software program of claim 20 further comprising instructions to a computer to perform the step of requesting that audio recording data be captured to the buffer.

24. The software program of claim 20 further comprising instructions to a computer to perform the step of writing a known value into the buffer.

Assignments (10)
RELEASE OF SECURITY INTEREST IN PATENTS (REEL/FRAME 045034/0001) Recorded May 18, 2023
From: GOLDMAN SACHS BANK USA., AS COLLATERAL AGENT
To: ZANG, INC. (FORMER NAME OF AVAYA CLOUD INC.); AVAYA INC.; INTELLISIST, INC.; AVAYA INTEGRATED CABINET SOLUTIONS LLC; OCTEL COMMUNICATIONS LLC; VPNET TECHNOLOGIES, INC.; HYPERQUALITY, INC.; HYPERQUALITY II, LLC; CAAS TECHNOLOGIES, LLC; AVAYA MANAGEMENT L.P.
Reel/Frame 063779/0622 →
RELEASE OF SECURITY INTEREST IN PATENTS AT REEL 45124/FRAME 0026 Recorded Apr 26, 2023
From: CITIBANK, N.A., AS COLLATERAL AGENT
To: AVAYA HOLDINGS CORP.; AVAYA INC.; AVAYA MANAGEMENT L.P.; AVAYA INTEGRATED CABINET SOLUTIONS LLC
Reel/Frame 063457/0001 →
SECURITY INTEREST Recorded Jan 23, 2018
From: AVAYA INC.; AVAYA INTEGRATED CABINET SOLUTIONS LLC; OCTEL COMMUNICATIONS LLC; VPNET TECHNOLOGIES, INC.; ZANG, INC.
To: CITIBANK, N.A., AS COLLATERAL AGENT
Reel/Frame 045124/0026 →
RELEASE OF SECURITY INTEREST Recorded Jan 11, 2018
From: CITICORP USA, INC.
To: AVAYA, INC.; SIERRA HOLDINGS CORP.
Reel/Frame 045045/0564 →
SECURITY INTEREST Recorded Jan 10, 2018
From: AVAYA INC.; AVAYA INTEGRATED CABINET SOLUTIONS LLC; OCTEL COMMUNICATIONS LLC; VPNET TECHNOLOGIES, INC.; ZANG, INC.
To: GOLDMAN SACHS BANK USA, AS COLLATERAL AGENT
Reel/Frame 045034/0001 →
BANKRUPTCY COURT ORDER RELEASING ALL LIENS INCLUDING THE SECURITY INTEREST RECORDED AT REEL/FRAME 030083/0639 Recorded Dec 15, 2017
From: THE BANK OF NEW YORK MELLON TRUST COMPANY, N.A.
To: AVAYA INC.
Reel/Frame 045012/0666 →
BANKRUPTCY COURT ORDER RELEASING ALL LIENS INCLUDING THE SECURITY INTEREST RECORDED AT REEL/FRAME 023892/0500 Recorded Dec 15, 2017
From: CITIBANK, N.A.
To: AVAYA INC.
Reel/Frame 044891/0564 →
BANKRUPTCY COURT ORDER RELEASING ALL LIENS INCLUDING THE SECURITY INTEREST RECORDED AT REEL/FRAME 025863/0535 Recorded Dec 15, 2017
From: THE BANK OF NEW YORK MELLON TRUST, NA
To: AVAYA INC.
Reel/Frame 044892/0001 →
BANKRUPTCY COURT ORDER RELEASING ALL LIENS INCLUDING THE SECURITY INTEREST RECORDED AT REEL/FRAME 041576/0001 Recorded Dec 15, 2017
From: CITIBANK, N.A.
To: AVAYA INC.; AVAYA INTEGRATED CABINET SOLUTIONS INC.; OCTEL COMMUNICATIONS LLC (FORMERLY KNOWN AS OCTEL COMMUNICATIONS CORPORATION); VPNET TECHNOLOGIES, INC.
Reel/Frame 044893/0531 →
SECURITY INTEREST Recorded Jan 27, 2017
From: AVAYA INC.; AVAYA INTEGRATED CABINET SOLUTIONS INC.; OCTEL COMMUNICATIONS CORPORATION; VPNET TECHNOLOGIES, INC.
To: CITIBANK, N.A., AS ADMINISTRATIVE AGENT
Reel/Frame 041576/0001 →