Data path architecture for a LAN switch
A packet switching device having a central shared memory and a number of medium access controllers each coupled to a communications medium to exchange data packets, and a controller coupled to each medium access controller via a data path to exchange data packets with the media access controller. The controller has a number of data path controllers each connected to each medium access controller to exchange a corresponding portion of the data packets with the medium access controller. The data path controllers each have a number of buffers to hold the portion of the data packets exchanged with the corresponding medium access controller. Each data path controller has a selector that selects the buffer from which to exchange the portion of the data packets with the central shared memory and control logic that controls the selector to concurrently select the buffer corresponding to the same medium access controller.
1. An information handling device, comprising:
an input port coupled with an external data bus to receive a data packet;
a data manipulation device comprising:
a first data path controller coupled with the input port to receive a first portion of the data packet; and
a second data path controller coupled with the input port to concurrently receive a second portion of the data packet; and
a memory coupled with the data manipulation device to concurrently receive and store therein the first portion of the data packet from the first data path controller and the second portion of the data packet from the second data path controller.
2. The information handling device of claim 1 , wherein the first data path controller is implemented in a first integrated circuit and the second data path controller is implemented in a second, separate integrated circuit.
3. A method for processing data packets in an information handling device, comprising:
receiving a data packet at an input port of the information handling device;
splitting the data packet into at least a first and second portion;
transferring the first portion of the data packet on a first receive data path in the information handling device;
transferring the second portion of the data packet on a second receive data path in the information handling device;
receiving the first portion of the data packet at a first data path controller coupled with the first receive data path concurrently with receiving the second portion of the data packet at a second data path controller coupled with the second receive data path; and
transferring the first portion and the second portion of the data packet concurrently to the memory via a data path.
4. The method of claim 3 , further comprising:
transferring the first portion and the second portion of the data packet from the memory via the data path;
receiving via the data path the first portion of the data packet at the first data path controller concurrently with receiving via the data path the second portion of the data packet at the second data path controller;
transmitting the first portion of the data packet on a first transmit data path to an output port coupled with the first transmit data path;
transmitting the second portion of the data packet on a second transmit data path to the output port coupled with the second transmit data path;
combining the first and second portions of the data packet at the output port; and
transmitting the data packet from the output port of the information handling device.
5. A method for transferring a data packet from a communications medium to a memory of a packet switching device coupled with the communications medium, comprising:
receiving a first data pack et at a first input port coupled with a first communications medium;
receiving a second data packet at a second input port coupled with a second communications medium;
receiving and holding a first portion of the first data packet in a first buffer;
receiving and holding a first portion of the second data packet in a second buffer;
receiving and holding a second portion of the first data packet in a third buffer;
receiving and holding a second portion of the second data packet in a fourth buffer;
concurrently transferring the first and second portions of the first data packet from the first and third buffers to memory; concurrently transferring the first and second portions of the second data packet from the second and fourth buffers to memory.
6. A data packet switching device having a central shared memory, comprising:
a number of medium access controllers each coupled with a separate communications medium to exchange data packets therewith;
a controller coupled with each medium access controller via a data path to exchange data packets therewith, the controller comprising a number of data path controllers each coupled with each of the number of medium access controllers via a separate port ion of the data path to exchange a corresponding portion of the data packets therewith, the data path controllers each comprising:
a number of buffers each coupled with one of the medium access controllers to which the data path controller is coupled, each to hold the corresponding portion of the data packets exchanged with the corresponding medium access controller; and
a selector that selects the buffers from which to do one of concurrently transmit and concurrently receive, the corresponding portions of the data packets with the central shared memory; and
control logic that controls the selector in each data path controller to concurrently select the buffers corresponding to the same medium access controller.