IP Library › Granted Patent US 6,563,747
Granted Patent Utility
US 6,563,747 · Confirmation No. 9071

INTEGRATED DATA INPUT SORTING AND TIMING CIRCUIT FOR DOUBLE DATA RATE (DDR) DYNAMIC RANDOM ACCESS MEMORY (DRAM) DEVICES

Inventor: Jon Allan Faue
Patented Case View Patent ↗ View Publication ↗
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 Code Description Pages PDF
2001-11-13 TRNA Transmittal of New Application 3 View
2001-11-13 DRW Drawings-only black and white line drawings 5 View
2001-09-18 TRNA Transmittal of New Application 3 View
2001-09-18 A.PE Preliminary Amendment 2 View
2001-09-18 SPEC Specification 14 View
2001-09-18 CLM Claims 9 View
2001-09-18 ABST Abstract 1 View
2001-09-18 DRW Drawings-only black and white line drawings 5 View
2001-09-18 OATH Oath or Declaration filed 2 View
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Quick Facts
Patent No.
US 6,563,747
App. No.
09/955,234
Filed
2001-09-18
Granted
2003-05-13
Pub. No.
US20020149992A1
Art Unit
2824
PTA
0 days