IP Library › Granted Patent US 6,638,798
Granted Patent Utility
US 6,638,798 · Confirmation No. 3251

METHOD OF FABRICATING A SEMICONDUCTOR DEVICE OF HIGH-VOLTAGE CMOS STRUCTRE

Inventor: Kenya Kobayashi
Patented Case View Patent ↗ View Publication ↗
⬇ PDF
 Code Description Pages PDF
2003-08-04 IFEE Issue Fee Payment (PTO-85B) 1 View
2003-08-04 LET. Miscellaneous Incoming Letter 1 View
2003-08-04 DRW Drawings-only black and white line drawings 11 View
2001-09-28 TRNA Transmittal of New Application 2 View
2001-09-28 A.PE Preliminary Amendment 3 View
2001-09-28 SPEC Specification 49 View
2001-09-28 CLM Claims 11 View
2001-09-28 ABST Abstract 1 View
2001-09-28 DRW Drawings-only black and white line drawings 11 View
2001-09-28 OATH Oath or Declaration filed 2 View
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this application's details
Quick Facts
Patent No.
US 6,638,798
App. No.
09/964,393
Filed
2001-09-28
Granted
2003-10-28
Pub. No.
US20020048914A1
Examiner
PHAM, LONG
Art Unit
2814
PTA
-31 days