IP Library Granted Patent US 7,119,627
Granted Patent B2
US 7,119,627 · App. 09/966,204 · Granted Oct 10, 2006

Phase-locked loop circuit as well as a voltage-controlled oscillator as used in a phase-locked loop circuit

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Quick Facts
Patent No.
US 7,119,627
App. No.
09/966,204
Granted
Oct 10, 2006
Kind
B2
Abstract

A phase-locked loop circuit comprises a voltage-controlled oscillator with at least one resonator circuit for driving the oscillator to an output frequency which is a multiple of the resonator frequency. The voltage-controlled oscillator is connected to a phase-locked loop comprising frequency control means for controlling the output frequency of the oscillator. According to the invention the resonator circuit comprises at least one adjustable component and the frequency control means are coupled into the resonator circuit for controlling the resonator frequency of the resonator circuit. The invention moreover relates to a voltage-controlled oscillator as used in this phase-locked loop circuit.

Claims (12)

1. Phase-locked loop circuit comprising:

a voltage-controlled oscillator which includes at least one resonator circuit for driving the oscillator;

a phase-locked loop including frequency control means for controlling the output frequency of said oscillator, such that during operation said resonator circuit runs at a resonator frequency to drive said oscillator at an oscillator output frequency which is an integer multiple greater than one of the resonator frequency;

wherein the resonator frequency is coupled to the frequency control means of the phase-locked loop, and wherein the resonator circuit includes at least one adjustable component to control the resonator frequency.

2. Phase-locked loop circuit according to claim 1 , wherein the voltage-controlled oscillator comprises a push-pull circuit whose operating frequency is determined by a pair of resonator circuits and in that the frequency control means are coupled into at least one of said pair of resonator circuits.

3. Phase-locked loop circuit according to claim 2 , wherein the push-pull circuit comprises a pair of substantially identical active devices being coupled to said resonator circuits, and in that the frequency control means comprise a phase detector which is capable of generating an output signal which is fed back t the resonator circuits to control said active devices.

4. Phase-locked loop circuit according to claim 3 , wherein the active devices are field effect transistors.

5. Phase-locked loop circuit according to claim 3 , wherein the resonator circuits comprise LC-circuits with at least one variable capacitor in said LC-circuits being controlled by the frequency control means.

6. Phase-locked loop circuit according to claim 5 , wherein the LC-circuits comprise at least two variable capacitors each.

7. Phase-locked loop circuit according to claim 3 , wherein the active devices are each coupled in series with an inductor.

8. Phase-locked loop circuit according to claim 2 , wherein the resonator circuits are connected to a fixed potential via a load resistor.

9. Phase-locked loop circuit according to claim 1 , wherein the voltage-controlled oscillator comprises integrated components being integrated in a single semiconductor body.

Assignments (10)
CORRECTIVE ASSIGNMENT TO CORRECT THE EXECUTION DATE PREVIOUSLY RECORDED AT REEL: 047196 FRAME: 0097. ASSIGNOR(S) HEREBY CONFIRMS THE MERGER. Recorded Mar 6, 2019
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 048555/0510 →
MERGER Recorded Oct 4, 2018
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE. LIMITED
Reel/Frame 047196/0097 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENTS Recorded Feb 3, 2017
From: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 041710/0001 →
PATENT SECURITY AGREEMENT Recorded Feb 11, 2016
From: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
To: BANK OF AMERICA, N.A., AS COLLATERAL AGENT
Reel/Frame 037808/0001 →
TERMINATION AND RELEASE OF SECURITY INTEREST IN PATENT RIGHTS (RELEASES RF 032856-0031) Recorded Feb 2, 2016
From: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
To: LSI CORPORATION; AGERE SYSTEMS LLC
Reel/Frame 037684/0039 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Feb 20, 2015
From: AGERE SYSTEMS LLC
To: AVAGO TECHNOLOGIES GENERAL IP (SINGAPORE) PTE. LTD.
Reel/Frame 035059/0001 →
MERGER Recorded Feb 20, 2015
From: AGERE SYSTEMS GUARDIAN CORP.
To: AGERE SYSTEMS INC.
Reel/Frame 035058/0884 →
MERGER Recorded Feb 20, 2015
From: AGERE SYSTEMS INC.
To: AGERE SYSTEMS LLC
Reel/Frame 035058/0895 →
PATENT SECURITY AGREEMENT Recorded May 8, 2014
From: LSI CORPORATION; AGERE SYSTEMS LLC
To: DEUTSCHE BANK AG NEW YORK BRANCH, AS COLLATERAL AGENT
Reel/Frame 032856/0031 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 31, 2001
From: SUN, YANLING
To: AGERE SYSTEMS GUARDIAN CORP.
Reel/Frame 012419/0118 →