Generating pulses for resetting integrated circuits
View Patent ↗An integrated circuit may be initialized by determining that the supply voltage is ramping up and resetting logic in the integrated circuit to a predetermined initial state using a reset signal. After the logic is determined to be in its initial state and the supply voltage is established, the reset signal may be latched off. A pulse generator includes circuits that prevent the pulse generator from being reactivated until after a power cycle.
1. An integrated circuit comprising:
an activation circuit to determine whether a supply voltage reaches a predetermined level, said activation circuit including an inverter coupled to the gate of a load transistor, a second transistor coupled to said load transistor and a third transistor coupled between said load transistor and said second transistor;
a pulse generator to generate pulses to indicate that a the supply voltage is ramping up and to terminate the generation of the pulses after the supply voltage reaches a predetermined level; and
a feedback path to provide an output of said pulse generator to said activation circuit, the activation circuit to latch a high signal in response to a low signal on said feedback path.
2. The integrated circuit of claim 1 further including a logic functionality to emulate logic that is difficult to trigger and to determine whether the supply voltage has reached a level sufficient to trigger the difficult to trigger logic.
3. The integrated circuit of claim 1 including a level detector that detects when a voltage is above at least two transistor threshold voltages, said level detector operative to control said pulse generator.
4. The integrated circuit of claim 1 wherein the load transistor is coupled to the supply voltage.
5. The integrated circuit of claim 1 including a circuit to latch the pulse generator in response to the supply voltage being in a first state.
6. The integrated circuit of claim 1 further including a second activation circuit to determine whether the supply voltage reaches the predetermined level.
7. The integrated circuit of claim 1 including a pair of transistors that must both conduct in order to generate said pulses.
8. The integrated circuit of claim 7 including a capacitor circuit to enable the supply voltage to reach a designated output level.
9. The integrated circuit of claim 8 including a hysteresis sense stage coupled to said capacitor circuit.
10. The integrated circuit of claim 8 wherein the capacitor circuit includes a first capacitor coupled the supply voltage and a second capacitor coupled to the first capacitor through a transistor.