Patent Application
Utility
App. No. 09/977,902
· Confirmation No. 4141
LOGIC CIRCUIT WITH SINGLE CHARGE PULLING OUT TRANSISTOR AND SEMICONDUCTOR INTEGRATED CIRCUIT USING THE SAME
Patent Expired Due to NonPayment of Maintenance Fees Under 37 CFR 1.362
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2001-10-10 | TRNA |
Transmittal of New Application | 2 | View | |
| 2001-10-10 | ADS |
Application Data Sheet | 1 | View | |
| 2001-10-10 | A.PE |
Preliminary Amendment | 9 | View | |
| 2001-10-10 | SPEC |
Specification | 29 | View | |
| 2001-10-10 | CLM |
Claims | 10 | View | |
| 2001-10-10 | ABST |
Abstract | 1 | View | |
| 2001-10-10 | DRW |
Drawings-only black and white line drawings | 7 | View | |
| 2001-10-10 | OATH |
Oath or Declaration filed | 2 | View |
Inventors
Hiroyuki Takahashi
Tokyo, JAPAN
Mitsuru Sato
Tokyo, JAPAN
Attorneys & Agents of Record
Classification
USPC
326/105
G11C11/40
H03K19/09448
Prosecution
- Examiner
- CHO, JAMES HYONCHOL
- Art Unit
- 2819
- Docket No.
- P/2109-39
- Confirmation No.
- 4141
Foreign Priority
005899/1996
·
1996-01-17
·
JAPAN
Publication
- Pub. No.
- US20020024362A1
- Pub. Date
- 2002-02-28
Patent Term Adjustment
0days
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Quick Facts
- App. No.
- 09/977,902
- Filed
- 2001-10-10
- Granted
- 2002-09-03
- Pub. No.
- US20020024362A1
- Examiner
- CHO, JAMES HYONCHOL
- Art Unit
- 2819
- PTA
- 0 days
External Links