IP Library Granted Patent US 7,323,360
Granted Patent B2
US 7,323,360 · App. 10/003,238 · Granted Jan 29, 2008

Electronic assemblies with filled no-flow underfill

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Quick Facts
Patent No.
US 7,323,360
App. No.
10/003,238
Granted
Jan 29, 2008
Kind
B2
Abstract

High yield, high reliability, flip-chip integrated circuit (IC) packages are achieved utilizing a combination of heat and pressure to bond flip-chip die and to cure no-flow underfill material. The underfill comprises a filler or low coefficient of thermal expansion (CTE) material to decrease CTE of the cured underfill. The filler material can be selected from the group comprising silica, silicon oxide, silicon dioxide, silicon nitride, aluminum oxide, aluminum nitride, or a mixture thereof. The filler material may also increase the viscosity of the uncured underfill and/or increase the modulus of elasticity of the cured underfill. In some method embodiments, a thermocompression bonder is used to simultaneously provide solder bump reflow and underfill curing. Application of various methods to a component package, an electronic assembly, and an electronic system are also described.

Claims (18)

1. A component package fabricated by:

depositing an underfill material over a plurality of pads in a component-mounting area of a substrate, the underfill material comprising a filler material containing particles;

placing a component on the component-mounting area, such that terminals of the component are aligned with corresponding pads and substantially enveloped in the underfill material, the particles potentially inhibiting a suitable connection between corresponding terminals and pads unless the particles are substantially removed;

applying suitable pressure to cause the terminals to physically contact the pads and to remove most but not all potentially inhibiting particles from between corresponding terminals and pads, with one or more particles being embedded in one of the terminals, in its corresponding pad, or in both the one terminal and its corresponding pad without preventing adequate physical and electrical contact; and

applying suitable heat to melt solder situated between the terminals and pads, which when cooled results in an electrical and mechanical connection between corresponding terminals and pads.

2. The component package recited in claim 1 and fabricated such that the operations of applying suitable pressure and suitable heat are performed substantially concurrently by apparatus from the group comprising a thermocompression bonder, an ultrasonic bonder, and a component placement tool.

3. The component package recited in claim 1 and fabricated such that the pads are pre-coated with solder, and wherein, in applying suitable heat, the terminals become attached to the pads through the solder.

4. The component package recited in claim 1 and fabricated such that the terminals are pre-coated with solder, and wherein, in applying suitable heat, the terminals become attached to the pads through the solder.

5. The component package recited in claim 1 , wherein the filler material is selected from the group consisting of silica, silicon oxide, silicon dioxide, silicon nitride, aluminum oxide, and aluminum nitride.

6. The component package recited in claim 1 , wherein the underfill material further comprises a fluxing agent, and wherein, in the operation of applying suitable heat, the fluxing agent cleans the terminals and the pads.

7. An electronic assembly comprising at least one integrated circuit (IC) package fabricated by:

depositing an underfill material over a plurality of pads in an IC mounting area of a substrate, the underfill material comprising a filler material containing particles;

placing an IC on the IC mounting area, such that terminals of the IC are aligned with corresponding pads and substantially enveloped in the underfill material, the particles potentially inhibiting a suitable connection between corresponding terminals and pads unless the particles are substantially removed;

applying suitable pressure to cause the terminals to physically contact the pads and to squeeze out most but not all potentially inhibiting particles from between corresponding terminals and pads, with one or more particles being embedded in one of the terminals, in its corresponding pad, or in both the one terminal and its corresponding pad without preventing adequate physical and electrical contact; and

applying suitable heat to melt solder situated between the terminals and pads, which when cooled results in an electrical and mechanical connection between corresponding terminals and pads.

8. The electronic assembly recited in claim 7 and fabricated such that the operations of applying suitable pressure and suitable heat are performed substantially concurrently by apparatus from the group comprising a thermocompression bonder, an ultrasonic bonder, and a component placement tool.

9. The electronic assembly recited in claim 7 , wherein the underfill material comprises a filler material selected from the group consisting of silica, silicon oxide, silicon dioxide, silicon nitride, aluminum oxide, and aluminum nitride.

10. The electronic assembly recited in claim 7 , wherein the underfill material further comprises a fluxing agent, and wherein, in the operation of applying suitable heat, the fluxing agent cleans the terminals and the pads.

Assignments (9)
RELEASE OF SECURITY INTEREST Recorded Nov 12, 2019
From: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
Reel/Frame 051028/0001 →
RELEASE OF SECURITY INTEREST Recorded Oct 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 050937/0001 →
RELEASE OF SECURITY INTEREST Recorded Aug 23, 2018
From: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
To: MICRON TECHNOLOGY, INC.
Reel/Frame 047243/0001 →
SECURITY INTEREST Recorded Jul 13, 2018
From: MICRON TECHNOLOGY, INC.; MICRON SEMICONDUCTOR PRODUCTS, INC.
To: JPMORGAN CHASE BANK, N.A., AS COLLATERAL AGENT
Reel/Frame 047540/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REPLACE ERRONEOUSLY FILED PATENT #7358718 WITH THE CORRECT PATENT #7358178 PREVIOUSLY RECORDED ON REEL 038669 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY INTEREST. Recorded Jun 8, 2017
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 043079/0001 →
PATENT SECURITY AGREEMENT Recorded Jun 2, 2016
From: MICRON TECHNOLOGY, INC.
To: MORGAN STANLEY SENIOR FUNDING, INC., AS COLLATERAL AGENT
Reel/Frame 038954/0001 →
SECURITY INTEREST Recorded May 12, 2016
From: MICRON TECHNOLOGY, INC.
To: U.S. BANK NATIONAL ASSOCIATION, AS COLLATERAL AGENT
Reel/Frame 038669/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jul 4, 2013
From: INTEL CORPORATION
To: MICRON TECHNOLOGY, INC.
Reel/Frame 030740/0823 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Oct 26, 2001
From: GONZALEZ, CARLOS A.; SHI, SONG-HUA; DJUKIC, MILAN
To: INTEL CORPORATION
Reel/Frame 012355/0874 →