Interface for integrating reconfigurable processors into a general purpose computing system
View Patent ↗The present invention describes a method and system for an interface for integrating reconfigurable processors into a general purpose computing system. In particular, the system resides in a computer system containing standard instruction processors, as well as reconfigurable processors. The interface includes a command processor, a command list memory, various registers, a direct memory access engine, a translation look-aside buffer, a dedicated section of common memory, and a dedicated memory. The interface is controlled via commands from a command list that is created during compilation of a user application, or various direct commands.
1. A method for processing command processor commands compiled from a user application, said method comprising the steps of:
storing command lists into an area of common memory;
receiving a fetch command sent by the user application;
fetching a command list from the common memory;
loading the command list into a command list memory within an interface;
processing of the command list;
interacting with user logic to exchange data and control signals;
determining if a second command list is ready for processing; and
wherein if the second command list is ready for processing, processing the second command list in the same method as the command list, and wherein otherwise await a second fetch command.
2. The method of claim 1 , wherein the loading of the command list further comprises receiving a fetch done signal when the entire command list has been loaded.
3. The method of claim 1 , wherein the processing of the command list further comprises the step of determining if the command list length exceeds a length limit,
wherein if the command list length exceeds the length limit, an interrupt is generated and processing of the command list is halted.
4. The method of claim 1 further comprising the step of halting execution.
5. The method of claim 4 , wherein the halting execution further comprises the steps of:
terminating the execution of control logic;
saving control state data in dedicated memory;
saving status and control data;
saving translation look-aside data;
if halt request was not received via a direct command, and if interrupts are enabled, sending an interrupt; and
halting further execution.
6. The method of claim 4 further comprising the step of continuing execution.
7. The method of claim 6 wherein continuing execution further comprises the steps of:
determining reason for halting execution; and
restarting execution.
8. The method of claim 7 , wherein if processing is to be continued from a partially processed instruction, the step of restarting execution further comprises the steps of:
making necessary changes to parameters in the status and control data, and translation look-aside data;
reloading control state data in dedicated memory;
reloading status and control data;
reloading translation look-aside data;
issuing a continue from saved command; and
processing instructions.
9. The method of claim 7 , wherein if processing is to be continued from a fully processed instruction, the step of restarting execution further comprises the steps of:
reloading control state data in dedicated memory;
reloading status and control data;
reloading translation look-aside data;
issuing a continue command; and
processing instructions.
10. The method of claim 7 , wherein if a new sequence is to be started, the step of restarting execution further comprises the steps of:
loading a command list;
issuing a direct command to start execution; and
processing the command list.