Granted Patent B2

US 6,982,939 · App. 10/012,257 · Granted Jan 3, 2006

Assignee: LSI Logic Corporation

Abstract

Claims (128)

1. A method of compensating a data write process in a data communication or storage channel, said method comprising:

writing at least one data pattern to said channel using a write strategy matrix;

reading said data pattern;

deriving a sensitivity matrix for said channel from information obtained during said read process;

deriving a systematic error matrix for said channel from information obtained during said read process;

deriving write strategy parameters from said sensitivity matrix and systematic error matrix;

updating said write strategy matrix using at least in part said write strategy parameters; and

writing data using said updated write strategy matrix.

2. A method of compensating as recited in claim 1 wherein said write strategy parameters are configured to control the time course of writing laser pulses.

3. A method of compensating as recited in claim 1 wherein said write strategy parameters are derived so that data transitions in the output of said storage channel are adjusted to occur at desired points in time.

4. A method of compensating as recited in claim 1 wherein said channel includes an optical phase change data storage media.

5. A method of compensating as recited in claim 1 wherein said channel includes an optical dye based disc.

6. A method of compensating as recited in claim 1 wherein said channel includes a fiber optic communication channel.

7. A method of deriving a write strategy matrix that maps a plurality of input sequences to a plurality of write strategy parameters, said input sequences each including a plurality of input data elements, said method comprising:

writing a data pattern to a storage channel;

recovering an output data pattern from said storage channel;

deriving channel sensitivities from said data pattern and said output data pattern;

writing an input data sequence to said storage channel said input sequence including a plurality of subsequences;

recovering an output data sequence from said storage channel;

deriving systematic errors from said output data sequence; and

using said sensitivities and said systematic errors to derive said plurality of write strategy parameters.

8. A method of deriving a write strategy matrix as recited in claim 7 wherein said sensitivities are derived by comparing data transitions.

9. A method of deriving a write strategy matrix as recited in claim 7 wherein said systematic errors are derived by comparing data transitions.

10. A method of deriving a write strategy matrix as recited in claim 7 wherein a subsequence contains three data elements.

11. A method of deriving a write strategy matrix as recited in claim 7 wherein a subsequence contains five data elements.

12. A method of deriving a write strategy matrix as recited in claim 7 wherein said channel includes a phase change optical media.

13. A method of deriving a write strategy matrix as recited in claim 7 wherein said storage channel includes a dye based optical media.

14. A method of improving a write strategy matrix, said write strategy matrix mapping a plurality of input sequences to a plurality of write strategy parameters, said input sequences each including a plurality of input data elements, said method comprising:

writing a data pattern to a storage channel using said write strategy matrix;

recovering an output data pattern from said storage channel;

deriving sensitivities from said data pattern and said output data pattern;

writing an input sequence to said storage channel using said write strategy matrix, said input sequences including a plurality of subsequences;

recovering an output data sequence from said storage channel;

deriving systematic errors from said output data sequence; and

using said sensitivities and said systematic errors to adjust said plurality of write strategy parameters.

15. A method of deriving a write strategy matrix as recited in claim 14 wherein said sensitivities are derived by comparing data transitions.

16. A method of deriving a write strategy matrix as recited in claim 14 wherein said systematic errors are derived by comparing data transitions.

17. A method of deriving a write strategy matrix as recited in claim 14 wherein a subsequence contains three data elements.

18. A method of deriving a write strategy matrix as recited in claim 14 wherein a subsequence contains five data elements.

19. A method of deriving a write strategy matrix as recited in claim 14 wherein said storage channel includes a phase change optical disc.

20. A method of deriving a write strategy matrix as recited in claim 14 wherein said storage channel includes a dye based optical disc.

21. A method of deriving a write strategy matrix as recited in claim 14 where said writing an input sequence, recovering an output data sequence, deriving systematic errors, and using said sensitivities and said systematic errors are repeated at least once.

22. A method of compensating a data writing process in a binary optical disc storage channel using a write strategy matrix, said method comprising:

shifting at least one of the data transitions in a first data pattern by a predetermined amount to form a perturbed data pattern;

writing said perturbed data pattern to said storage channel;

recovering said perturbed data pattern from said storage channel;

comparing the timing of transitions in the recovered data patterns to determine timing sensitivities;

generating a second data pattern having a plurality of binary levels;

writing said second data pattern to said storage channel;

recovering said second data pattern from said storage channel;

comparing the timing of transitions in the recovered second data pattern to target timing transition locations to determine systematic errors;

calculating write strategy parameters using said timing sensitivities and said systematic errors; and

updating said write strategy matrix with said write strategy parameters.

23. A method of compensating a data writing process as recited in claim 22 wherein said second data pattern contains three binary levels.

24. A method of compensating a data writing process as recited in claim 22 wherein said second data pattern contains five binary levels.

25. A method of compensating a data writing process as recited in claim 22 wherein said binary optical disc storage channel includes a phase change optical media.

26. A method of compensating a data writing process as recited in claim 22 wherein said binary optical disc storage channel includes a dye based optical media.

27. A method of compensating a data writing process as recited in claim 22 where the data writing process uses a run-length-limited modulation.

28. A system for compensating a data writing process in a data storage or communication channel using a write strategy matrix, said system comprising:

a writer configured to write a data pattern to a storage channel using said write strategy matrix;

a processor configured to:

(a) determine a sensitivity matrix for said storage channel;

(b) determine a systematic error matrix for said storage channel; and

(c) derive write strategy parameters from said sensitivity matrix and systematic error matrix, said processor being capable of updating said write strategy matrix with said write strategy parameters.

29. A system for compensating as recited in claim 28 wherein said write strategy parameters are configured to control the time course of writing laser pulses.

30. A system for compensating as recited in claim 28 wherein said write strategy parameters are derived so that data transitions in the output of said storage channel are adjusted to occur at desired points in time.

31. A system for compensating as recited in claim 28 wherein said storage channel includes an optical phase change media.

32. A system for compensating as recited in claim 28 wherein said storage channel includes an optical dye based media.

33. An optical data storage drive comprising:

a memory storing a write strategy matrix;

a write control circuit configured to control a write laser in accordance with said write strategy matrix;

a read signal transition detector configured to measure the location of read signal transitions;

a processing circuit coupled to said read signal transition detector and configured to update said write strategy matrix using at least in part locations of read signal transitions detected by said read signal transition detector; and

a histogram calculator configured to determine a number of transitions within a selected time window.

34. The optical data storage drive of claim 33 , wherein said write control circuit controls the timing of changes in write laser intensity in accordance with said write strategy matrix.

35. The optical data storage drive of claim 33 , wherein said read signal transition detector is coupled to a clock signal operating at a multiple of the read signal transition rate.

36. The optical data storage drive of claim 33 , wherein said processing circuit is configured to calculate a mean transition location from data received from said histogram calculator.

37. A system for deriving a write strategy matrix that maps a plurality of input sequences to a plurality of write strategy parameters, said input sequences each including a plurality of input data elements, said system comprising:

a writer configured to write a data pattern to a storage channel;

a reader configured to recover an output data pattern from said storage channel;

a means for deriving sensitivities from said data pattern and said output data pattern;

a means for writing an input sequence to said storage channel said input sequence including a plurality of subsequences;

a means for recovering an output data sequence from said storage channel; and

a processor configured to derive systematic errors from said output data sequence and use said sensitivities and said systematic errors to derive said plurality of write strategy parameters.

38. A system for deriving a write strategy matrix as recited in claim 37 wherein said sensitivities are derived by comparing data transitions.

39. A system of deriving a write strategy matrix as recited in claim 37 wherein said systematic errors are derived by comparing data transitions.

40. A system of deriving a write strategy matrix as recited in claim 37 wherein a subsequence contains three data elements.

41. A system for deriving a write strategy matrix as recited in claim 37 wherein a subsequence contains five data elements.

42. A system for deriving a write strategy matrix as recited in claim 37 wherein said storage channel includes a phase change optical disc.

43. A system of deriving a write strategy matrix as recited in claim 37 wherein said storage channel includes a dye based optical disc.

44. A system for improving a write strategy matrix, said write strategy matrix mapping a plurality of input sequences to a plurality of write strategy parameters, said input sequences each including a plurality of input data elements, said system comprising:

a writer configured to write a data pattern to a storage channel using said write strategy matrix;

a reader configured to recover an output data pattern from said storage channel;

a means for deriving sensitivities from said data pattern and said output data pattern;

a means for writing an input sequence to said storage channel using said write strategy matrix, said input sequences including a plurality of subsequences;

a means for recovering an output data sequence from said storage channel;

a processor configured to derive systematic errors from said output data sequence and to use said sensitivities and said systematic errors to derive said plurality of write strategy parameters.

45. A system for deriving a write strategy matrix as recited in claim 44 wherein said sensitivities are derived by comparing data transitions.

46. A system for deriving a write strategy matrix as recited in claim 44 wherein said systematic errors are derived by comparing data transitions.

47. A system for deriving a write strategy matrix as recited in claim 44 wherein a subsequence contains three data elements.

48. A system for deriving a write strategy matrix as recited in claim 44 wherein a subsequence contains five data elements.

49. A system for deriving a write strategy matrix as recited in claim 44 wherein said storage channel includes a phase change optical disc.

50. A system of deriving a write strategy matrix as recited in claim 44 wherein said storage channel includes a dye based optical disc.

51. A system for compensating a data writing process in a binary optical disc storage channel using a write strategy matrix, said system comprising:

a pattern generator configured to generate data patterns having a plurality of binary levels;

a writer configured to write said generated data patterns to said storage channel;

a reader configured to recover said generated data pattern from said storage channel;

a means for shifting at least one of the data transitions in at least one data pattern by a predetermined amount to form a perturbed data pattern;

a comparator configured to compare the timing of transitions in the recovered perturbed data pattern to determine timing sensitivities;

logic circuitry configured to compare the timing of transitions in a recovered unperturbed data pattern to determine systematic errors, calculate write strategy parameters using said timing sensitivities and said systematic errors, and update said write strategy matrix with said write strategy parameters.

52. A system for compensating a data writing process as recited in claim 51 wherein said data patterns contain three binary levels.

53. A system for compensating a data writing process as recited in claim 51 wherein said data patterns contain five binary levels.

54. A system for compensating a data writing process as recited in claim 51 wherein said binary optical disc storage channel includes a phase change optical disc.

55. A system for compensating a data writing process as recited in claim 51 wherein said binary optical disc storage channel includes a dye based optical disc.

56. A system for compensating a data writing process as recited in claim 51 where the data writing process uses a run-length-limited modulation.

57. A method of optimizing the performance of a data storage or communication channel, said method comprising:

determining channel sensitivity to modifications in write signal parameters;

detecting systematic errors in a read signal recovered from data written with a first set of write parameters;

adjusting said write signal parameters by an amount determined from said channel sensitivity such that said systematic errors are reduced when data are written with said adjusted write parameters.

58. The method of claim 57 , additionally comprising:

determining systematic errors in a read signal recovered from data written with said adjusted set of write parameters;

further adjusting said write signal parameters by an amount determined from said channel sensitivity such that said systematic errors are additionally reduced when data are written with said further adjusted write signal parameters.

59. The method of claim 58 , wherein said write signal parameters are iteratively adjusted until said systematic errors are reduced below a predetermined threshold.

60. A method of adjusting a data write operation in an optical data storage or communication channel comprising:

indexing transition types based on the pattern of neighboring transitions within a fixed time window of each indexed transition;

defining a plurality of write strategy parameters corresponding to different ones of the indexed transitions; and controlling write laser operation in accordance with said plurality of write strategy parameters when writing the indexed transitions.

61. The method of claim 60 , wherein said fixed time window comprises an 8T window on either side of each indexed transition.

62. The method of claim 60 , wherein controlling write laser operation comprises controlling the timing of laser pulse edges.

Assignments (13)

Continuity (2)