Granted Patent
Utility
US 6,716,648
· Confirmation No. 2943
METHOD OF MANUFACTURING SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE
Inventor:
Nobuyuki Iriki
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⬇ PDF
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2004-02-23 | IFEE |
Issue Fee Payment (PTO-85B) | 1 | View | |
| 2001-12-26 | TRNA |
Transmittal of New Application | 2 | View | |
| 2001-12-26 | SPEC |
Specification | 66 | View | |
| 2001-12-26 | CLM |
Claims | 14 | View | |
| 2001-12-26 | ABST |
Abstract | 1 | View | |
| 2001-12-26 | DRW |
Drawings-only black and white line drawings | 24 | View | |
| 2001-12-26 | OATH |
Oath or Declaration filed | 3 | View |
Inventors
Nobuyuki Iriki
Kodaira, JAPAN
Attorneys & Agents of Record
Classification
USPC
438/784
G03F7/70533
H10P74/23
Prosecution
- Examiner
- SMITH, BRADLEY
- Art Unit
- 2824
- Customer No.
- 20457
- Docket No.
- 843.41041X00
- Confirmation No.
- 2943
Foreign Priority
2000-394885
·
2000-12-26
·
JAPAN
Publication
- Pub. No.
- US20020081758A1
- Pub. Date
- 2002-06-27
Patent Term Adjustment
-2days
No related applications found.
CHANGE OF ADDRESS
Recorded 2017-11-29
MERGER AND CHANGE OF NAME
Recorded 2010-09-09
from
HITACHI, LTD.
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2003-09-26
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Quick Facts
- Patent No.
- US 6,716,648
- App. No.
- 10/025,458
- Filed
- 2001-12-26
- Granted
- 2004-04-06
- Pub. No.
- US20020081758A1
- Examiner
- SMITH, BRADLEY
- Art Unit
- 2824
- PTA
- -2 days
External Links