Patent Application
Utility
App. No. 10/026,683
· Confirmation No. 9356
Method of manufacturing a semiconductor device including dual-damascene process
Inventor:
Akira Matumoto
Abandoned -- Failure to Respond to an Office Action
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Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2001-12-27 | TRNA |
Transmittal of New Application | 2 | View | |
| 2001-12-27 | ADS |
Application Data Sheet | 3 | View | |
| 2001-12-27 | SPEC |
Specification | 10 | View | |
| 2001-12-27 | CLM |
Claims | 5 | View | |
| 2001-12-27 | ABST |
Abstract | 1 | View | |
| 2001-12-27 | DRW |
Drawings-only black and white line drawings | 5 | View | |
| 2001-12-27 | OATH |
Oath or Declaration filed | 2 | View |
Inventors
Akira Matumoto
Tokyo, JAPAN
Attorneys & Agents of Record
Classification
USPC
438/633
H10W20/084
Prosecution
- Examiner
- LEE, HSIEN MING
- Art Unit
- 2823
- Customer No.
- 165061
- Docket No.
- 8123-1101
- Confirmation No.
- 9356
Foreign Priority
2000-399585
·
2000-12-27
·
JAPAN
Publication
- Pub. No.
- US20020081840A1
- Pub. Date
- 2002-06-27
No related applications found.
from
NEC CORPORATION
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2003-05-28
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Quick Facts
- App. No.
- 10/026,683
- Filed
- 2001-12-27
- Pub. No.
- US20020081840A1
- Examiner
- LEE, HSIEN MING
- Art Unit
- 2823
External Links