IP Library › Granted Patent US 6,541,319
Granted Patent Utility
US 6,541,319 · Confirmation No. 5792

METHOD OF MANUFACTURING A SELF-ALIGNED GATE TRANSISTOR WITH P-TYPE IMPURITIES SELECTIVELY IMPLANTED BELOW THE GATE, SOURCE AND DRAIN ELECTRODES

Patented Case View Patent ↗ View Publication ↗
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 Code Description Pages PDF
2021-10-06 N570 Communication - Re: Power of Attorney (PTOL-308) 1 View
2021-10-06 N570 Communication - Re: Power of Attorney (PTOL-308) 1 View
2021-10-02 PA.. Power of Attorney 1 View
2021-10-02 MFEE.C.AD Maintenance Fee Address Change 1 View
2021-10-02 R3.73 Assignee showing of ownership per 37 CFR 3.73 2 View
2021-10-02 N417 Electronic Filing System Acknowledgment Receipt 2 View
2001-12-26 TRNA Transmittal of New Application 3 View
2001-12-26 SPEC Specification 9 View
2001-12-26 CLM Claims 3 View
2001-12-26 ABST Abstract 1 View
2001-12-26 DRW Drawings-only black and white line drawings 4 View
2001-12-26 OATH Oath or Declaration filed 3 View
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Quick Facts
Patent No.
US 6,541,319
App. No.
10/032,754
Filed
2001-12-26
Granted
2003-04-01
Pub. No.
US20020081810A1
Art Unit
2813
PTA
-4 days