Patent Application
Utility
App. No. 10/037,373
· Confirmation No. 6808
Layout method of analog/digital mixed semiconductor integrated circuit
Inventor:
Tatsuhito Saito
Abandoned -- Failure to Respond to an Office Action
View Publication ↗
|
⬇ PDF
|
Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2001-10-24 | TRNA |
Transmittal of New Application | 2 | View | |
| 2001-10-24 | SPEC |
Specification | 15 | View | |
| 2001-10-24 | CLM |
Claims | 3 | View | |
| 2001-10-24 | ABST |
Abstract | 1 | View | |
| 2001-10-24 | DRW |
Drawings-only black and white line drawings | 8 | View | |
| 2001-10-24 | OATH |
Oath or Declaration filed | 1 | View |
Inventors
Tatsuhito Saito
Kanagawa, JAPAN
Attorneys & Agents of Record
Classification
USPC
716/10
G06F30/39
Prosecution
- Examiner
- LIN, SUN J
- Art Unit
- 2825
- Customer No.
- 26304
- Docket No.
- NEC 19.087
- Confirmation No.
- 6808
Foreign Priority
325648/2000
·
2000-10-25
·
JAPAN
Publication
- Pub. No.
- US20020095648A1
- Pub. Date
- 2002-07-18
No related applications found.
from
NEC CORPORATION
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2003-02-19
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this application's details
Quick Facts
- App. No.
- 10/037,373
- Filed
- 2001-10-24
- Pub. No.
- US20020095648A1
- Examiner
- LIN, SUN J
- Art Unit
- 2825
External Links