IP Library Granted Patent US 6,969,915
Granted Patent B2
US 6,969,915 · App. 10/043,225 · Granted Nov 29, 2005

Semiconductor device, manufacturing method and apparatus for the same

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Quick Facts
Patent No.
US 6,969,915
App. No.
10/043,225
Granted
Nov 29, 2005
Kind
B2
Abstract

A highly reliable semiconductor chip electrode structure allowing control of interface reaction of bonding sections even in the case of using two- or three-element solder used conventionally is disclosed. A solder alloy making layer for preventing dissolving and diffusion of tin into tin-based lead free solder is thinly formed on a UBM layer. The tin-based solder is supplied in solder paste or solder ball form. A combined solder alloy layer composed of a combination of intermetallic compounds, one of tin and the solder alloy making layer, and one of tin and the UBM layer, is formed by heating and melting.

Claims (103)

1. A semiconductor device having at least a solder bump formed of alloy solder on an under-bump layer including a first metal formed above a wiring layer, comprising:

an intermetallic compound including a metal that is the main component of the alloy solder and a second metal different from the metal that is the main component of the alloy solder, said second metal also being different from a metal in the adjoining under-bump layer, wherein the intermetallic compound is formed between the solder bump and the adjoining under-bump layer.

2. The semiconductor device according to claim 1 , wherein the metal that is the main component of the alloy solder is tin.

3. The semiconductor device according to claim 2 , wherein metal that is a second main component of the alloy solder after the tin is silver.

4. The semiconductor device of claim 2 , wherein copper is added to the alloy solder.

5. The semiconductor device of claim 3 , wherein copper is added to the alloy solder.

6. The semiconductor device according to claim 1 , wherein the second metal is a metal which is different from the first metal and is allowed to form an intermetallic compound with tin.

7. The semiconductor device according to claim 6 , wherein the second metal is copper.

8. The semiconductor device according to claim 1 , wherein the first metal included in the under-bump layer includes nickel.

9. The semiconductor device according to claim 8 , wherein the under-bump layer is a laminated film formed from one of nickel and nickel alloy with different film qualities.

10. The semiconductor device according to claim 9 , wherein the nickel alloy includes one selected from a group consisting of nickel/vanadium alloy, nickel/phosphorous alloy and nickel titanium alloy.

11. The semiconductor device according to claim 8 , wherein the under-bump layer is a laminated film formed from one of nickel and nickel alloy and one of copper and copper alloy.

12. The semiconductor device according to claim 11 , wherein the nickel alloy includes one selected from a group consisting of nickel/vanadium alloy, nickel/phosphorous alloy and nickel titanium alloy.

13. The semiconductor device according to claim 1 , wherein a contact layer is provided between the wiring layer and the under-bump layer.

14. The semiconductor device of claim 13 , wherein the contact layer includes one of titanium and titanium/tungsten alloy.

15. The semiconductor device according to claim 1 , wherein the alloy solder does not contain lead.

16. A semiconductor device having at least a solder bump formed of alloy solder on an under-bump layer including a first metal formed above a wiring layer, comprising:

an alloy layer composed of a combination of an intermetallic compound of a metal that is the main component of the alloy solder and a second metal different from the metal that is the main component of the alloy solder, said second metal also being different from a metal in the adjoining under-bump layer, and an intermetallic compound of the first metal included in the under-bump layer and the metal that is the main component of the alloy solder, wherein the alloy layer is formed between the solder bump and the adjoining under-bump layer.

17. The semiconductor device according to claim 16 , wherein the metal that is the main component of the alloy solder is tin.

18. The semiconductor device according to claim 17 , wherein metal that is a second main component of the alloy solder after the tin is silver.

19. The semiconductor device of claim 18 , wherein copper is added to the alloy solder.

20. The semiconductor device of claim 17 , wherein copper is added to the alloy solder.

21. The semiconductor device according to claim 16 , wherein the second metal is a metal which is different from the first metal and is allowed to form an intermetallic compound with tin.

22. The semiconductor device according to claim 21 , wherein the second metal is copper.

23. The semiconductor device according to claim 16 , wherein the first metal included in the under-bump layer includes nickel.

24. The semiconductor device according to claim 23 , wherein the under-bump layer is a laminated film formed from one of nickel and nickel alloy with different film qualities.

25. The semiconductor device according to claim 24 , wherein the nickel alloy includes one selected from a group consisting of nickel/vanadium alloy, nickel/phosphorous alloy and nickel titanium alloy.

26. The semiconductor device according to claim 23 , wherein the under-bump layer is a laminated film formed from one of nickel and nickel alloy and one of copper and copper alloy.

27. The semiconductor device according to claim 26 , wherein the nickel alloy includes one selected from a group consisting of nickel/vanadium alloy, nickel/phosphorous alloy and nickel titanium alloy.

28. The semiconductor device according to claim 16 , wherein a contact layer is provided between the wiring layer and the under-bump layer.

29. The semiconductor device of claim 28 , wherein the contact layer includes one of titanium and titanium/tungsten alloy.

30. The semiconductor device according to claim 16 , wherein the alloy solder does not contain lead.

31. A semiconductor device having at least a solder bump formed of alloy solder on an under-bump layer including a first metal formed above a wiring layer, comprising:

an intermetallic compound formed between the solder bump and the adjoining under-bump layer, wherein the intermetallic compound includes:

a second metal constituting a metal layer that is temporarily arranged on the under-bump layer, said second metal also being different from a metal in the adjoining under-bump layer, and is then dissolved into the alloy solder on formation of the solder bump; and

a metal that is the main component of the alloy solder.

32. The semiconductor device according to claim 31 , wherein the metal that is the main component of the alloy solder is tin.

33. The semiconductor device according to claim 32 , wherein metal that is a second main component of the alloy solder after the tin is silver.

34. The semiconductor device of claim 33 , wherein copper is added to the alloy solder.

35. The semiconductor device of claim 32 , wherein copper is added to the alloy solder.

36. The semiconductor device according to claim 31 , wherein the second metal is a metal which is different from the first metal and is allowed to form an intermetallic compound with tin.

37. The semiconductor device according to claim 36 , wherein the second metal is copper.

38. The semiconductor device according to claim 31 , wherein the first metal included in the under-bump layer includes nickel.

39. The semiconductor device according to claim 38 , wherein the under-bump layer is a laminated film formed from one of nickel and nickel alloy with different film qualities.

40. The semiconductor device according to claim 39 , wherein the nickel alloy includes one selected from a group consisting of nickel/vanadium alloy, nickel/phosphorous alloy and nickel titanium alloy.

41. The semiconductor device according to claim 38 , wherein the under-bump layer is a laminated film formed from one of nickel and nickel alloy and one of copper and copper alloy.

42. The semiconductor device according to claim 41 , wherein the nickel alloy includes one selected from a group consisting of nickel/vanadium alloy, nickel/phosphorous alloy and nickel titanium alloy.

43. The semiconductor device according to claim 31 , wherein a contact layer is provided between the wiring layer and the under-bump layer.

44. The semiconductor device of claim 43 , wherein the contact layer includes one of titanium and titanium/tungsten alloy.

45. The semiconductor device according to claim 31 , wherein the alloy solder does not contain lead.

46. A semiconductor device having at least a solder bump formed of alloy solder on an under-bump layer including a first metal formed above a wiring layer, comprising:

an alloy layer formed between the solder bump and the adjoining under-bump layer, wherein the alloy layer is composed of a combination of:

an intermetallic compound composed of a second metal constituting a metal layer that is temporarily arranged on the under-bump layer, said second metal also being different from a metal in the adjoining under-bump layer, and is then dissolved into the alloy solder on formation of the solder bump, and a metal that is the main component of the alloy solder; and

an intermetallic compound of the first metal included in the adjoining under-bump layer and the metal that is the main component of the alloy solder.

47. The semiconductor device according to claim 46 , wherein the metal that is the main component of the alloy solder is tin.

48. The semiconductor device according to claim 47 , wherein metal that is a second main component of the alloy solder after the tin is silver.

49. The semiconductor device of claim 48 , wherein copper is added to the alloy solder.

50. The semiconductor device of claim 47 , wherein copper is added to the alloy solder.

51. The semiconductor device according to claim 46 , wherein the second metal is a metal which is different from the first metal and is allowed to form an intermetallic compound with tin.

52. The semiconductor device according to claim 51 , wherein the second metal is copper.

53. The semiconductor device according to claim 46 , wherein the first metal included in the under-bump layer includes nickel.

54. The semiconductor device according to claim 53 , wherein the under-bump layer is a laminated film formed from one of nickel and nickel alloy with different film qualities.

55. The semiconductor device according to claim 54 , wherein the nickel alloy includes one selected from a group consisting of nickel/vanadium alloy, nickel/phosphorous alloy and nickel titanium alloy.

56. The semiconductor device according to claim 53 , wherein the under-bump layer is a laminated film formed from one of nickel and nickel alloy and one of copper and copper alloy.

57. The semiconductor device according to claim 56 , wherein the nickel alloy includes one selected from a group consisting of nickel/vanadium alloy, nickel/phosphorous alloy and nickel titanium alloy.

58. The semiconductor device according to claim 46 , wherein a contact layer is provided between the wiring layer and the under-bump layer.

59. The semiconductor device of claim 58 , wherein the contact layer includes one of titanium and titanium/tungsten alloy.

60. The semiconductor device according to claim 46 , wherein the alloy solder does not contain lead.

61. An electrode structure comprising:

an under-bump layer;

a solder bump comprising an alloy solder; and

an intermetallic compound, including a metal that is the main component of the alloy solder and a second metal different from the metal that is the main component of the alloy solder, said second metal also being different from a metal in the adjoining under-bump layer, formed between the adjoining under-bump layer and the solder bump.

62. A semiconductor device comprising:

a wiring layer;

an under-bump layer formed above the wiring layer;

a solder bump comprising an alloy solder; and

an alloy layer provided between the solder bump and the adjoining under-bump layer, wherein the alloy layer comprises:

the main component of the alloy solder; and

a metal which is different from the main component of the alloy solder and is also different from a metal included in the adjoining under-bump layer.

63. The semiconductor device according to claim 62 , wherein the alloy layer comprises an alloy of:

the main component of the alloy solder; and

the metal which is different from the main component of the alloy solder and is also different from the metal included in the adjoining under-bump layer.

64. The semiconductor device according claim 63 , wherein the alloy layer comprises an alloy of:

the main component of the alloy solder; and

the metal included in the adjoining under-bump layer.

65. The semiconductor device according to claim 62 , wherein the alloy layer comprises an alloy of:

the main component of the alloy solder; and

the metal included in the adjoining under-bump layer.

66. An electrode structure comprising:

an under-bump layer;

a solder bump comprising an alloy solder; and

an alloy layer provided between the solder bump and the adjoining under-bump layer, wherein the alloy layer comprises:

at least the main component of the alloy solder; and

a metal which is different from the main component of the alloy solder and is also different from a metal included in the adjoining under-bump layer.

67. The electrode structure according to claim 66 , wherein the alloy layer comprises an alloy of:

the main component of the alloy solder; and

the metal which is different from the main component of the alloy solder and is also different from the metal included in the adjoining under-bump layer.

68. The electrode structure according to claim 67 , wherein the alloy layer comprises an alloy of:

the main component of the alloy solder; and

the metal included in the adjoining under-bump layer.

69. The electrode structure according to claim 66 , wherein the alloy layer comprises an alloy of:

the main component of the alloy solder; and

the metal included in the adjoining under-bump layer.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 28, 2015
From: NEC CORPORATION
To: GODO KAISHA IP BRIDGE 1
Reel/Frame 034834/0806 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Jan 14, 2002
From: TAGO, MASAMOTO; NISHIYAMA, TOMOHIRO; TAO, TETUYA; MIKAGI, KAORU
To: NEC CORPORATION
Reel/Frame 012508/0970 →