Granted Patent
Utility
US 6,542,410
· Confirmation No. 3962
NONVOLATILE SEMICONDUCTOR MEMORY DEVICE CAPABLE OF REDUCING PRE-ERASE WRITE TIME AND ERASE METHOD THEREFOR
Inventor:
Yasuaki Hirano
Inventors
Yasuaki Hirano
Tenri-shi, JAPAN
Attorneys & Agents of Record
Classification
USPC
365/185.3
G11C16/107
G11C16/344
G11C16/3472
Prosecution
- Examiner
- NGUYEN, TAN
- Art Unit
- 2818
- Customer No.
- 25227
- Docket No.
- 204552022400
- Confirmation No.
- 3962
Foreign Priority
2001-19894
·
2001-01-29
·
JAPAN
Publication
- Pub. No.
- US20020154547A1
- Pub. Date
- 2002-10-24
Patent Term Adjustment
0days
No related applications found.
CORRECTIVE ASSIGNMENT TO CORRECT THE ASSIGNEE NAME PREVIOUSLY RECORDED AT REEL: 035120 FRAME: 0878. ASSIGNOR(S) HEREBY CONFIRMS THE ASSIGNMENT.
Recorded 2015-06-05
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2015-03-02
ASSIGNMENT OF ASSIGNOR'S INTEREST
Recorded 2011-12-15
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Quick Facts
- Patent No.
- US 6,542,410
- App. No.
- 10/056,061
- Filed
- 2002-01-28
- Granted
- 2003-04-01
- Pub. No.
- US20020154547A1
- Examiner
- NGUYEN, TAN
- Art Unit
- 2818
- PTA
- 0 days
External Links