Patent Assignment
Reel/Frame 035120/0878
Assignment of Assignor's Interest
Recorded: 2015-03-02
Pages: 10
Assignor
INTELLECTUAL PROPERTIES I KFT.
Executed: 2014-12-22
Assignee
SAMSUNG ELECTRONICS CO., LTD
416, MAETAN-DONG, YEONGTONG-GU, GYEONGGI-DO, SUWON-SI, KOREA, REPUBLIC OF
Covered Properties
(126)
Semiconductor Memory Device Having Word Line and Bit Line Test Circuits
Patent:
5,331,594 →
Application:
07/776,052 →
Read-Only Memory
Patent:
5,280,442 →
Application:
07/781,630 →
Non-Volatile Memory and Method of Manufacturing the Same
Patent:
5,268,585 →
Application:
07/896,010 →
Method for Manufacturing Non-Volatile Memory
Patent:
5,981,366 →
Application:
07/945,902 →
Semiconductor Read Only Memory
Patent:
5,295,092 →
Application:
08/007,197 →
Non-Volatile Associative Memory with Low Transistor Count
Patent:
5,347,483 →
Application:
08/027,132 →
Semiconductor Memory
Patent:
5,402,387 →
Application:
08/031,177 →
Nonvolatile Memory, Method of Fabricating the Same, and Method of Reading Information from the Same
Patent:
5,414,286 →
Application:
08/033,560 →
Semiconductor Memory Device with Shared Sense Amplifiers
Patent:
5,394,371 →
Application:
08/163,399 →
Process for Fabricating Nonvolatile Random Access Memory Having a Tunnel Oxide Film
Patent:
5,411,904 →
Application:
08/231,740 →
Nonvolatile Memory Cell and Method of Producing the Same
Patent:
5,493,140 →
Application:
08/262,831 →
Flash Memory Having Inclined Channel
Patent:
5,502,321 →
Application:
08/327,910 →
Nonvolatile Semiconductor Memory Device
Patent:
5,526,308 →
Application:
08/371,008 →
Method of Making Nonvolatile Memory Cell with Crystallized Floating Gate
Patent:
5,597,749 →
Application:
08/447,243 →
Semiconductor Memory Device Having Floating Gate Transistors and Data Holding Means
Patent:
5,602,777 →
Application:
08/449,022 →
Method of Manufacturing Flash Memory with Inclined Channel Region
Patent:
5,591,652 →
Application:
08/452,695 →
Non-Volatile Dynamic Random Access Memory
Patent:
5,619,470 →
Application:
08/459,098 →
Semiconductor Memory Device with Dual Address Memory Read Amplifiers
Patent:
5,619,473 →
Application:
08/459,792 →
Method for Rewriting a Flash Memory
Patent:
5,576,995 →
Application:
08/547,158 →
Semiconductor Memory Device and Method for Driving the Same
Patent:
5,689,468 →
Application:
08/571,544 →
Nonvolatile Semiconductor Memory Device
Patent:
5,677,874 →
Application:
08/635,478 →
Semiconductor Memory Device That Allows for Reconfiguration Around Defective Zones in a Memory Array
Patent:
6,006,313 →
Application:
08/660,738 →
Semiconductor Memory Device
Patent:
5,717,637 →
Application:
08/666,238 →
Nonvolatile Semiconductor Memory Device
Patent:
5,673,222 →
Application:
08/666,979 →
Semiconductor Memory Device
Patent:
5,708,603 →
Application:
08/678,873 →
Nonvolatile Semiconductor Storage Device
Patent:
5,652,450 →
Application:
08/684,585 →
Nonvolatile Semiconductor Memory and with a Floating Gate That Has a Bottom Surface That Is Smaller Than the Upper Surface
Patent:
5,962,889 →
Application:
08/690,621 →
Method for Writing Multiple Value into Nonvolatile Memory in an Equal Time
Patent:
5,708,600 →
Application:
08/725,661 →
Method for Forming Field Oxide Film
Patent:
5,880,008 →
Application:
08/731,431 →
Semiconductor Memory Device with Fast Successive Read Operation
Patent:
5,748,561 →
Application:
08/742,338 →
Method and System for Inspecting Semiconductor Memory Device
Patent:
5,771,191 →
Application:
08/838,984 →
Nonvolatile Semiconductor Memory Device with Write Protect Data Settings for Disabling Erase from and Write into a Block, and Erase and Re-Erase Settings for Enabling Write into and Erase from a Block
Patent:
6,000,004 →
Application:
08/884,981 →
A Data Writing Circuit for a Nonvolatile Semiconductor Memory
Patent:
5,910,918 →
Application:
08/924,417 →
Semiconductor Memory Device
Patent:
6,040,999 →
Application:
08/954,174 →
Semiconductor Storage Device
Patent:
5,917,767 →
Application:
08/993,797 →
Semiconductor Storage Device Capable of Accurately Collectively Executing Erase Verify Operation on All Memory Cells
Patent:
6,081,452 →
Application:
09/025,996 →
Non Volatile Semiconductor Memory Device
Patent:
5,978,273 →
Application:
09/050,317 →
Method of Driving a Nonvolatile Semiconductor Storage Device
Patent:
6,072,722 →
Application:
09/111,664 →
Non-Volatile Semiconductor Device Performing Simultaneous Operations Using Sense Amplifiers
Patent:
6,292,392 →
Application:
09/163,714 →
Sense Amplifier Circuit
Patent:
6,265,906 →
Application:
09/172,754 →
Sense Amplifier Circuit
Patent:
6,154,065 →
Application:
09/174,370 →
Non-Volatile Semiconductor Memory Allowing User to Enter Various Refresh Commands
Patent:
6,240,032 →
Application:
09/199,875 →
Charge Pump for Operation at a Wide Range of Power Supply Voltages
Patent:
6,157,242 →
Application:
09/272,248 →
Method for Manufacturing Semiconductor Device
Patent:
6,274,487 →
Application:
09/327,171 →
Nonvolatile Semiconductor Memory Device Capable of Decreasing Layout Area for Writing Defective Address
Patent:
6,111,785 →
Application:
09/379,009 →
Semiconductor Device and a Process for Manufacturing the Same
Test Circuit for Semiconductor Ic Device
Patent:
6,366,111 →
Application:
09/483,465 →
Data programming method for a nonvolatile semiconductor storage
Patent:
6,195,287 →
Application:
09/497,053 →
Semiconductor Memory Device Having Floating Gate Type Transistors Programmed to Have Dirrering Threshold Voltages
Patent:
6,301,154 →
Application:
09/497,318 →
Semiconductor Memory Device
Patent:
6,594,777 →
Application:
09/505,514 →
File System with Assured Integrity Incorporating Semiconductor Memory Device
Patent:
6,513,095 →
Application:
09/568,529 →
Semiconductor Device and Process for Manufacturing Semiconductor Device
Patent:
6,380,584 →
Application:
09/587,187 →
Semiconductor Device with Floating Gates
Patent:
6,441,430 →
Application:
09/588,761 →
Method for erasing nonvolatile semiconductor storage device capable of preventing erroneous reading
Patent:
6,256,228 →
Application:
09/590,378 →
Defective address data storage circuit for nonvolatile semiconductor memory device having redundant function and method of writing defective address data
Patent:
6,198,659 →
Application:
09/592,964 →
Erase Method for Nonvolatile Semiconductor Storage Device and Row Decoder Circuit for Fulfilling the Method
Patent:
6,711,058 →
Application:
09/598,384 →
Non-volatile semiconductor memory device and system LSI including the same
Patent:
6,370,058 →
Application:
09/656,314 →
Method Of Manufacturing Silicide and Self-Aligned Contact For A Semiconductor Device
Patent:
6,562,680 →
Application:
09/688,683 →
Memory device capable of preventing from illegally read out memory contents
Patent:
6,351,418 →
Application:
09/695,051 →
Method for Erasing Data from a Non-Volatile Semiconductor Memory Device
Patent:
6,404,681 →
Application:
09/703,516 →
Circuit for storing and latching defective address data for a nonvolatile semiconductor memory device having redundant function
Patent:
6,331,949 →
Application:
09/745,526 →
Formation Method of Pattern
Semiconductor Memory Device and Restoration Method Therefor
Voltage Level Shifter Circuit and Nonvolatile Semiconductor Storage Device Using the Circuit
Nonvolatile Semiconductor Storage Device
Semiconductor Storage Device
Semiconductor Device and Control Device for Use Therewith
Semiconductor Storage Device
Nonvolatile Semiconductor Memory Device, Process of Manufacturing the Same and Method of Operating the Same
Erasing Method for Nonvolatile Semiconductor Memory Device Capable of Improving a Threshold Voltage Distribution
Erase Method for Nonvolatile Semiconductor Memory Device
Test Methods for Semiconductor Non-Volatile Memories
Semiconductor Memory and Its Production Process
Non-Volatile Semiconductor Memory Device Capable of Executing Erasable, Writable and Readable Functions Simultaneously
Nonvolatile Semiconductor Storage Device Capable of Correctly Reading Selected Memory Cell and Read Method Therefor
Nonvolatile Semiconductor Memory Device and Method of Erasing the Same
Nonvolatile Semiconductor Memory Device Capable of Reducing Pre-Erase Write Time and Erase Method Therefor
Nonvolatile Semiconductor Memory Device
Nonvolatile Semiconductor Memory Well Voltage Setting Circuit Without Latchup and Semiconductor Memory Device Provided with the Circuit
Reference Voltage Generation the Circuit for Semiconductor Memory Device, Memory Reading Circuit Including Same, and Electronic Information Device Including the Same
Raised Voltage Generation Circuit
Semiconductor Memory Including Cell(S) with Both Charge Storage Layer (S) and Control Gate Laterally Surrounding Island-Like Semiconductor Layer
Method for Driving Nonvolatile Semiconductor Memory Device
Process for Manufacturing Semiconductor Memory Device Having Floating and Control Gates in Which Multiple Insulating Films Are Formed Over Floating Gates
Nonvolatile Semiconductor Memory Device and Electronic Information Apparatus
Semiconductor Memory with Gate at Least Partially Located in Recess Defined in Vertically Oriented Semiconductor Layer
Semiconductor Memory and Its Production Process
Semiconductor Integrated Circuit
Nonvolatile Semiconductor Storage Device
Semiconductor Memory Device and Information Device
Data Transfer Control Device, Semiconductor Memory Device and Electronic Information Apparatus
Nonvolatile Semiconductor Memory Device
Non-Volatile Semiconductor Memory Device and Information Apparatus
Power-On Reset Circuit and Ic Card
Semiconductor Charge Pump Circuit and Nonvolatile Semiconductor Memory Device
Nonvolatile Semiconductor Memory Device with Floating Gate and Two Control Gates
Nonvolatile Semiconductor Memory Device and Method of Detecting Overerased Cell
Nonvolatile Semiconductor Storage Device and Write Time Determining Method Therefor
Semiconductor Storage Device and Information Apparatus
Nonvolatile Semiconductor Memory and Method of Operating the Same
Non-Volatile Semiconductor Memory and Method of Operating the Same
Non-Volatile Semiconductor Memory and Process of Fabricating the Same
Nonvolatile Semiconductor Memory Device and Data Erase Method Therefor
Nonvolatile Semiconductor Memory Device
Semiconductor Memory Device and Method for Writing Data
Semiconductor Storage Device
Nonvolatile Semiconductor Storing Device and Block Redundancy Saving Method
Reading Circuit, Reference Circuit, and Semiconductor Memory Device
Semiconductor Memory Device
Reading Circuit and Semiconductor Memory Device Including the Same
Non-Volatile Semiconductor Memory Device and Data Write Control Method for the Same
Semiconductor Device and Chip-Stack Semiconductor Device
Nonvolatile Semiconductor Storage Device and Row-Line Short Defect Detection Method
Semiconductor Memory Device and Its Production Process
Erroneous Operation Preventing Circuit of Non-Volatile Memory Device
Nonvolatile Semiconductor Memory Device
Semiconductor Memory Device and Manufacturing Method for the Same
Nonvolatile Semiconductor Storage Device, and Liquid Crystal Display Device Including the Same
Memory Cell Unit, Nonvolatile Semiconductor Storage Device Including Memory Cell Unit, and Memory Cell Array Driving Method
Method for Manufacturing Semiconductor Device
Test Terminal Negation Circuit for Protecting Data Integrity
Method of Writing Data to a Non-Volatile Semiconductor Memory
Nonvolatile semiconductor memory and method of operating the same
Virtual Ground Line Type Memory Device with High Speed Readout Circuit
Method for Setting Erasing Pulses and Screening Erasing Defects of Nonvolatile Memory
Semiconductor Device and Chip-Stack Semiconductor Device
Related Assignments
(6)
Other recorded transfers of the patents in this record — the chain of ownership.
Assignment of Assignor's Interest
Nov 7, 2011
From: IGUCHI, KATSUJI
To: SHARP KABUSHIKI KAISHA
Reel/Frame 027185/0488 →
Assignment of Assignor's Interest
Nov 9, 2011
From: HOTTA, YASUHIRO
To: SHARP KABUSHIKI KAISHA
Reel/Frame 027199/0378 →
Assignment of Assignor's Interest
Nov 11, 2011
From: YAMAUCHI, YOSHIMITSU; TANAKA, KENICHI; SAKIYAMA, KEIZO; AYUKAWA, AKITSU
To: SHARP KABUSHIKI KAISHA
Reel/Frame 027214/0647 →
Assignment of Assignor's Interest
Nov 11, 2011
From: MATSUSHITA, TADASHI
To: SHARP KABUSHIKI KAISHA
Reel/Frame 027214/0773 →
Assignment of Assignor's Interest
Dec 15, 2011
From: SHARP KABUSHIKI KAISHA
To: INTELLECTUAL PROPERTIES I KFT.
Reel/Frame 027387/0650 →
Corrective Assignment to Correct the Assignee Name Previously Recorded at Reel: 035120 Frame: 0878. Assignor(S) Hereby Confirms the Assignment.
Jun 5, 2015
From: INTELLECTUAL PROPERTIES I KFT.
To: SAMSUNG ELECTRONICS CO., LTD.
Reel/Frame 035837/0619 →