Granted Patent
Utility
US 6,198,659 · App. 09/592,964
Defective address data storage circuit for nonvolatile semiconductor memory device having redundant function and method of writing defective address data
Inventor:
Yasuaki Hirano
Patented Case
View Patent ↗
Granted: Mar 6, 2001
Filed: Jun 13, 2000
Inventor
Yasuaki Hirano
Assignee (at issue)
SHARP KABUSHIKI KAISHA
This patent predates the USPTO's electronic file wrapper — prosecution documents from this era exist only in the Patent Office's paper records. A certified copy of the file history can be ordered from the USPTO's paper archives.