Semiconductor device and method of manufacturing the same
View Patent ↗A semiconductor chip has a quadrangle main surface, a wiring substrate, and a resin seal member for sealing the semiconductor chip, in which the resin seal member has a quadrangle main surface which confronts the main surface of the semiconductor chip. A gate cut trace portion is formed on a side face extending along a first side of the main surface of the resin seal member. A sectional area of an area between the main surface of the wiring substrate and the main surface of the resin seal member at a position outside a side face of the semiconductor chip is smaller than a sectional area of an area between the main surface of the semiconductor chip and the main surface of the resin seal member.
1. A method of manufacturing a semiconductor device, comprising the steps of:
providing a semiconductor chip having a quadrangular main surface, a wiring substrate with the semiconductor chip disposed on a main surface thereof, and a molding die having a cavity and a resin pouring gate, the cavity having a quadrangular main surface which confronts the main surface of the semiconductor chip, the resin pouring gate being formed in a side face extending along a first side of the main surface of the cavity; and
positioning the wiring substrate in the molding die in such a manner that the main surface of the semiconductor chip and the main surface of the cavity confront each other and that a first side of the main surface of the semiconductor chip confronts the first side of the main surface of the cavity, and thereafter pouring resin into the cavity through the resin pouring gate to form a resin seal member which seals the semiconductor chip with the resin,
wherein the resin sealing step for the semiconductor chip is carried out in a state in which, in a section orthogonal to a second side of the main surface of the semiconductor chip which intersects the first side of the main surface of the semiconductor chip, a sectional area of an area between the main surface of the wiring substrate and the main surface of the cavity at a position outside a side face along the extending direction of the second side of the main surface of the semiconductor chip is smaller than a sectional area of an area between the main surface of the semiconductor chip and the main surface of the cavity.
2. A method according to claim 1 , wherein the resin pouring gate is opposed to the first side of the main surface of the semiconductor chip.
3. A method according to claim 1 , wherein the resin pouring gate is opposed to a central part of a first side of a main surface of the resin seal member.