IP Library Granted Patent US 7,535,093
Granted Patent B1
US 7,535,093 · App. 10/094,174 · Granted May 19, 2009

Method and apparatus for packaging circuit devices

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Quick Facts
Patent No.
US 7,535,093
App. No.
10/094,174
Granted
May 19, 2009
Kind
B1
Abstract

A hermetically sealed package includes a lid ( 14 ) hermetically bonded to a wafer or substrate ( 12 ), with a chamber therebetween defined by a recess ( 16 ) in the lid. A circuit device ( 26 ) such as MEMS device is provided within the chamber on the substrate. A plurality of vias ( 41 - 46 ) are provided through the substrate, and each have a structure which facilitates a hermetic seal of a suitable level between opposite sides of the substrate. The vias provide electrical communication from externally of the assembly to the device disposed in the chamber.

Claims (15)

1. An apparatus, comprising:

a substrate having first and second sides, and having therethrough an opening which extends from said first side to said second side;

a via which is disposed in said opening, which provides a hermetic seal within said opening with respect to opposite sides of said substrate, which has first and second ends respectively adjacent said first and second sides of said substrate, and which includes a conductive portion providing electrical conductivity between said first and second ends thereof;

structure provided on said first side of said substrate and electrically coupled to said conductive portion at said first end of said via;

wherein said via includes a sleevelike portion which is made of an electrically conductive material, and an electrically non-conductive core portion disposed within said sleevelike portion; and

including within said opening a layer of an electrically insulating material which is provided on said substrate, said sleevelike portion of said via engaging said insulating material.

2. An apparatus according to claim 1 , wherein said sleevelike portion includes an outer sleeve made of titanium tungsten, and an inner sleeve made of gold.

3. An apparatus according to claim 1 , wherein said core portion is made of a glass material.

4. An apparatus according to claim 1 , including a conductive ground layer provided on said second side of said substrate, said ground layer having therethrough an opening with a size greater than a size of said second end of said via, said second end of said via being positioned within said opening through said ground layer in a manner so that said conductive portion of said via is free of contact with said ground layer.

5. An apparatus according to claim 1 ,

wherein said substrate has on said first side thereof a first annular surface portion extending around said structure and said first end of said via; and

including a cover having a second annular surface portion which is hermetically sealingly coupled to said first annular surface portion on said substrate, said substrate and said cover defining a chamber therebetween which has said structure therein and which has a pressure therein significantly different from a gas pressure externally of said substrate and cover.

6. An apparatus according to claim 5 , wherein said cover is made of a glass material.

7. An apparatus according to claim 5 , wherein said cover has in a side thereof facing said substrate a recess which serves as said chamber, said second annular surface portion extending around said recess.

8. An apparatus according to claim 5 , wherein said structure includes a micro-electro-mechanical system.

Assignments (6)
CHANGE OF NAME Recorded Nov 24, 2025
From: INVENSAS LLC
To: ADEIA SEMICONDUCTOR TECHNOLOGIES LLC
Reel/Frame 073508/0745 →
CHANGE OF NAME Recorded Nov 24, 2025
From: INVENSAS CORPORATION
To: INVENSAS LLC
Reel/Frame 073941/0814 →
RELEASE OF SECURITY INTEREST Recorded Jun 11, 2020
From: ROYAL BANK OF CANADA
To: TESSERA, INC.; INVENSAS BONDING TECHNOLOGIES, INC. (F/K/A ZIPTRONIX, INC.); FOTONATION CORPORATION (F/K/A DIGITALOPTICS CORPORATION AND F/K/A DIGITALOPTICS CORPORATION MEMS); INVENSAS CORPORATION; TESSERA ADVANCED TECHNOLOGIES, INC; DTS, INC.; DTS LLC; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
Reel/Frame 052920/0001 →
SECURITY INTEREST Recorded Jun 1, 2020
From: ROVI SOLUTIONS CORPORATION; ROVI TECHNOLOGIES CORPORATION; ROVI GUIDES, INC.; TIVO SOLUTIONS INC.; VEVEO, INC.; INVENSAS CORPORATION; INVENSAS BONDING TECHNOLOGIES, INC.; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: BANK OF AMERICA, N.A.
Reel/Frame 053468/0001 →
SECURITY INTEREST Recorded Dec 2, 2016
From: INVENSAS CORPORATION; TESSERA, INC.; TESSERA ADVANCED TECHNOLOGIES, INC.; ZIPTRONIX, INC.; DIGITALOPTICS CORPORATION; DIGITALOPTICS CORPORATION MEMS; DTS, LLC; DTS, INC.; PHORUS, INC.; IBIQUITY DIGITAL CORPORATION
To: ROYAL BANK OF CANADA, AS COLLATERAL AGENT
Reel/Frame 040797/0001 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 20, 2012
From: RAYTHEON COMPANY
To: INVENSAS CORPORATION
Reel/Frame 029046/0885 →