IP Library Granted Patent US 6,720,815
Granted Patent Utility
US 6,720,815 · Confirmation No. 7136

PHASE ADJUSTOR FOR SEMICONDUCTOR INTEGRATED CIRCUIT DEVICE

Inventor: Hiroyuki Mizuno
⬇ PDF
Code Description Pages PDF
2004-03-03 IFEE Issue Fee Payment (PTO-85B) 1 View
2003-11-21 A.NE Response After Final Action 1 View
2003-11-21 CLM Claims 7 View
2003-11-21 REM Applicant Arguments/Remarks Made in an Amendment 3 View
2003-11-18 N/AP Notice of Appeal Filed 1 View
2003-11-18 XT/ Extension of Time 1 View
2002-03-26 TRNA Transmittal of New Application 2 View
2002-03-26 A.PE Preliminary Amendment 12 View
2002-03-26 SPEC Specification 17 View
2002-03-26 CLM Claims 7 View
2002-03-26 ABST Abstract 1 View
2002-03-26 DRW Drawings-only black and white line drawings 8 View
2002-03-26 OATH Oath or Declaration filed 3 View
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this application's details
Quick Facts
Patent No.
US 6,720,815
App. No.
10/105,362
Filed
2002-03-26
Granted
2004-04-13
Pub. No.
US20020105367A1
Examiner
LUU, AN T
Art Unit
2816
PTA
-91 days