Self-calibrating phase locked loop charge pump system and method

1. A charge pump circuit comprising:

a reference current circuit including a first operational amplifier having a positive input port and a negative input port, said reference current circuit being operable for defining a reference current through a first biasing transistor and having a first low output impedance associated therewith, and being coupled to a first output transistor to provide a negative current to an output of the charge pump circuit;

a replication feedback circuit including a second operational amplifier having a positive input port and a negative input port, said replication feedback circuit being coupled to said reference current circuit at a coupling node and operable for replicating said output voltage at said coupling node such that said reference current is defined in a second biasing transistor and having a second low impedance, and being coupled to a second output transistor to provide a positive current to the output of the charge pump circuit; and

reconfiguration means for permitting the charge pump circuit to be reconfigured to couple the positive input ports of the first and second operational amplifiers to the output voltage of the charge pump circuit and to couple the negative input ports of the first and second operational amplifiers to a reference voltage.

2. The charge pump circuit as claimed in claim 1 , wherein said charge pump circuit further includes calibration means for permitting the charge pump circuit to be adjusted to reduce to substantially zero any difference between the positive and negative currents to the output of the charge pump circuit.

3. The charge pump circuit as claimed in claim 1 , wherein said reconfiguration means includes a plurality of switches for controlling the positive and negative input signals to the first and second operational amplifiers.

4. The charge pump circuit as claimed in claim 1 , wherein said charge pump circuit further includes integration means for providing that the current difference is integrated into a phase locked loop filter capacitance.

5. The charge pump circuit as claimed in claim 2 , wherein said charge pump circuit is used in a phase loop frequency synthesizer that includes a phase locked loop output and said calibration means is engaged when said phase locked loop output is not required during operation of the circuit.

6. A charge pump circuit comprising:

a reference current circuit including a first operational amplifier having a positive input port and a negative input port, said reference current circuit being operable for defining a reference current through a first biasing transistor and having a first low output impedance associated therewith, and being coupled to a first output transistor to provide a negative current to an output of the charge pump circuit;

a replication feedback circuit including a second operational amplifier having a positive input port and a negative input port, said replication feedback circuit being coupled to said reference current circuit at a coupling node and operable for replicating said output voltage at said coupling node such that said reference current is defined in a second biasing transistor and having a second low impedance, and being coupled to a second output transistor to provide a positive current to the output of the charge pump circuit;

a reconfiguration circuit including a plurality of switches for controlling the positive and negative input signals to the first and second operational amplifiers, said reconfiguration circuit for permitting the charge pump circuit to be reconfigured to couple the positive input ports of the first and second operational amplifiers to the output voltage of the charge pump circuit and to couple the negative input ports of the first and second operational amplifiers to a reference voltage; and

calibration means for permitting the charge pump circuit to be adjusted to reduce to substantially zero any difference between the positive and negative currents to the output of the charge pump circuit.

7. The charge pump circuit as claimed in claim 6 , wherein said charge pump circuit further includes integration means for providing that the current difference is integrated into a phase locked loop filter capacitance.

8. The charge pump circuit as claimed in claim 6 , wherein said charge pump circuit is used in a phase loop frequency synthesizer that includes a phase locked loop output and said calibration means is engaged when said phase locked loop output is not required during operation of the circuit.

9. A charge pump circuit comprising:

a reference current circuit including a first operational amplifier having a positive input port and a negative input port, said reference current circuit being operable for defining a reference current through a first biasing transistor and having a first low output impedance associated therewith, and being coupled to a first output transistor to provide a negative current to an output of the charge pump circuit;

a replication feedback circuit including a second operational amplifier having a positive input port and a negative input port, said replication feedback circuit being coupled to said reference current circuit at a coupling node and operable for replicating said output voltage at said coupling node such that said reference current is defined in a second biasing transistor and having a second low impedance, and being coupled to a second output transistor to provide a positive current to the output of the charge pump circuit;

a reconfiguration circuit including a plurality of switches for controlling the positive and negative input signals to the first and second operational amplifiers, said reconfiguration circuit for permitting the charge pump circuit to be reconfigured to couple the positive input ports of the first and second operational amplifiers to the output voltage of the charge pump circuit and to couple the negative input ports of the first and second operational amplifiers to a reference voltage;

calibration means for permitting the charge pump circuit to be adjusted to reduce to substantially zero any difference between the positive and negative currents to the output of the charge pump circuit; and

integration means for providing that the current difference is integrated into a phase locked loop filter capacitance.

10. The charge pump circuit as claimed in claim 9 , wherein said charge pump circuit is used in a phase loop frequency synthesizer that includes a phase locked loop output and said calibration means is engaged when said phase locked loop output is not required during operation of the circuit.