IP Library Assignment 020550/0993
Patent Assignment
Reel/Frame 020550/0993

Assignment of Assignor's Interest

Recorded: 2008-02-25 Received: 2008-02-25 Pages: 7
Assignor
ANALOG DEVICES, INC.
Executed: 2008-01-29
Assignee
MEDIATEK, INC.
NO. 1 DUSING ROAD 1ST, SCIENCE-BASED INDUSTRIAL PARK, HSIN-CHU 300, TWX, TAIWAN
Covered Properties (30)
Transient Behavior While Switching Between Control Loops in a Switching Voltage Regulator
Application: 11/506,957 →
System and Method for Providing a Transmitter for Polar Modulation and Power Amplifier Linearization
Application: 11/450,115 →
Battery Charger System
Application: 11/273,121 →
Sample Rate Converter for Reducing the Sampling Frequency of a Signal by a Fractional Number
Application: 11/272,254 →
Dual-Mode Delta-Sigma Analog to Digital Converter System and Method
Application: 11/271,440 →
Balanced Dual Resistor String Digital to Analog Converter System and Method
Application: 11/272,252 →
Timing System and Method for a Wireless Transceiver System
Application: 11/272,253 →
System and Method for Providing Voltage Regulation in a Multi-Voltage Power System
Application: 11/269,468 →
Digital Filter System Whose Stopband Roots Lie on Unit Circle of Complex Plane and Associated Method
Application: 11/260,443 →
Digital data receiver for edge cellular standard with DC offset correction, channel impulse response estimation, I/Q phase imbalance compensation, interferece estimation, and selective equalization
Application: 10/988,142 →
Closed Loop Power Control of Non-Constant Envelope Waveforms Using Sample/Hold
Application: 10/790,911 →
Phase-Locked Loop Filter with Out of Band Rejection in Low Bandwidth Mode
Application: 10/770,064 →
Digital Signal Processor Architecture with Optimized Memory Access for Code Discontinuity
Application: 10/715,629 →
Method for Joint Dc Offset Correction and Channel Coefficient Estimation in a Receiver
Application: 10/689,330 →
Phase-Locked Loop Bandwidth Calibration Circuit and Method Thereof
Application: 10/679,023 →
Method for Correcting Dc Offsets in a Receiver
Application: 10/328,275 →
Method and an Apparatus to Actively Sink Current in an Integrated Circuit with a Floating I/O Supply Voltage
Application: 10/267,563 →
Schmitt Trigger Device with Disable
Application: 10/267,796 →
Method of Modulation Gain Calibration and System Thereof
Application: 10/230,763 →
Wideband Modulation Summing Network and Method Thereof
Application: 10/230,697 →
Offset Cancellation System for a Communication System Receiver
Application: 10/226,986 →
Direct Conversion Receiver Apparatus
Application: 10/133,084 →
Self-Calibrating Phase Locked Loop Charge Pump System and Method
Application: 10/131,863 →
Offset Calibration System and Method for a High Gain Signal Channel
Application: 10/128,125 →
Transmitter and Receiver Circuit for Radio Frequency Signals
Application: 10/077,286 →
Glitch Free Clock Select Switch
Application: 10/002,921 →
A Circuit and Method for Providing Centralized Synchronization for the Transportation of Data Between Devices in a Different Clock Domains on a Data Bus
Application: 09/981,021 →
Variable Gain Amplifier
Application: 09/815,698 →
Low Power Crystal Oscillator with Reduced Power Consumption
Application: 09/789,251 →
Direct Conversion Circuit for Radio Frequency Signals
Application: 09/785,383 →