Phase-locked loop bandwidth calibration circuit and method thereof

1. A phase-locked loop bandwidth calibration circuit, comprising:

a programmable charge pump;

a phase-locked loop filter operatively connected to said programmable charge pump;

an oscillator, operatively connected to said phase-locked loop filter, to generate a frequency signal based upon a signal received from said phase-locked loop filter; and

a control loop operatively connected to said phase-locked loop filter and said programmable charge pump;

said control loop including a gain measurement circuit, operatively connected to said oscillator, to measure a gain of said oscillator;

said control loop controlling said programmable charge pump to adjust its output current level based on the measured gain of said oscillator;

said gain measurement circuit including,

a voltage difference measurement circuit, operatively connected to said phase-locked loop filter, to measure a voltage difference corresponding to two voltages being output from said phase-locked loop filter at different times,

an analog to digital converter, operatively connected to said voltage difference measurement circuit, to convert the measured voltage difference into a digital signal, and

a controller to cause said programmable charge pump to adjust its output current level based upon a received digital signal from said analog to digital converter.

2. The phase-locked loop bandwidth calibration circuit as claimed in claim 1 , wherein said control loop controls said programmable charge pump to adjust its output current level so that the product of the measured gain and a charge pump current level is kept constant.

3. The phase-locked loop bandwidth calibration circuit as claimed in claim 1 , further comprising:

a voltage reference circuit, operatively connected to said programmable charge pump and said analog to digital converter, to generate and apply a same reference voltage to said programmable charge pump and said analog to digital converter based upon changes in a reference voltage.

4. The phase-locked loop bandwidth calibration circuit as claimed in claim 1 , further comprising:

an integer-N divider operatively connected to an output of said oscillator; and

a phase and frequency detector operatively connected between said integer-N divider and said programmable charge pump.

5. The phase-locked loop bandwidth calibration circuit as claimed in claim 4 , wherein said control loop controls said programmable charge circuit to adjust its output current level so that the product of the measured gain and a charge pump current level divided by an average N value, said N value being provided by said integer-N divider, is kept constant.

6. The phase-locked loop bandwidth calibration circuit as claimed in claim 1 , further comprising:

an integer-N divider operatively connected to an output of said oscillator;

a sigma-delta-modulator operatively connected to said integer-N divider; and

a phase and frequency detector operatively connected between said integer-N divider and said programmable charge pump.

7. The phase-locked loop bandwidth calibration circuit as claimed in claim 6 , wherein said control loop controls said programmable charge pump to adjust its output current level so that the product of the measured gain and a charge pump current level divided by an average N value, said N value being provided by said integer-N divider, is kept constant.

8. The phase-locked loop bandwidth calibration circuit as claimed in claim 1 , wherein said phase-locked loop filter includes a capacitor; a charging circuit to pre-charge said capacitor to a voltage of said phase-locked loop filter; and a switch to switch said capacitor into the phase-locked loop filter circuit to effect a phase-locked loop bandwidth.

9. The phase-locked loop bandwidth calibration circuit as claimed in claim 1 , wherein said phase-locked loop filter includes a dual path having an integrator path and a lead-lag path.

10. The phase-locked loop bandwidth calibration circuit as claimed in claim 9 , wherein said programmable charge pump provides a first current output level to said integrator path and a second current output level to said lead-lag path.

11. A phase-locked loop bandwidth calibration circuit, comprising:

a programmable charge pump;

a phase-locked loop filter operatively connected to said programmable charge pump;

an oscillator, operatively connected to said phase-locked loop filter, to generate a frequency signal based upon a signal received from said phase-locked loop filter;

a control loop operatively connected to said phase-locked loop filter and said programmable charge pump;

said control loop including a gain measurement circuit, operatively connected to said oscillator, to measure a gain of said oscillator;

said control loop controlling said programmable charge pump to adjust its output current level based on the measured gain of said oscillator;

a programmable gain amplifier;

a comparator for comparing a voltage of an output from said programmable gain amplifier with a voltage necessary to produce a predetermined frequency shift in said oscillator to produce a gain signal; and

a gain controller, in response to said gain signal produced by said comparator, to control a gain of said programmable gain amplifier.

12. The phase-locked loop bandwidth calibration circuit as claimed in claim 11 , wherein said gain controller includes a counter and a plurality of resistors, said plurality of resistors being switchable into or out of a circuit connected between an output of said programmable gain amplifier and an input of said programmable gain amplifier.

13. The phase-locked loop bandwidth calibration circuit as claimed in claim 11 , wherein said gain controller controls the gain of said programmable gain amplifier such that a full scale input to said programmable gain amplifier produces said predetermined frequency shift in said oscillator.

14. A method of calibrating a phase-locked loop bandwidth, comprising:

(a) setting a phase-locked loop at a local oscillator offset;

(b) allowing the phase-locked loop to settle;

(c) measuring, after allowing the phase-locked loop set to the local oscillator offset to settle, a first voltage of a voltage-controlled oscillator located in the phase-locked loop;

(d) setting the phase-locked loop to a channel center frequency;

(e) allowing the phase-locked loop to settle;

(f) measuring, after allowing the phase-locked loop set to the channel center frequency to settle, a second voltage of the voltage-controlled oscillator;

(g) determining a difference between the first and second voltage measurements; and

(h) controlling a programmable charge circuit located in the phase-locked loop to adjust its output current level based on the determined voltage difference.

15. The method as claimed in claim 14 , wherein the programmable charge circuit adjusts its output current level so that the product of a measured gain and a charge pump current level is kept constant.