IP Library › Granted Patent US 7,132,317
Granted Patent B2
US 7,132,317 · App. 10/132,234 · Granted Nov 7, 2006

Method of manufacturing a semiconductor device that includes changing the internal stress of a conductive film

Assignee: Semiconductor Energy Laboratory Co., Ltd.
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Quick Facts
Patent No.
US 7,132,317
App. No.
10/132,234
Granted
Nov 7, 2006
Kind
B2
Abstract

There has been a case where peeling occurs if an internal stress of a wiring of a TFT is strong. In particular, the internal stress of a gate electrode largely influences a stress that a semiconductor film receives, and there has been a case where the internal stress becomes a cause of reduction in electric characteristics of a TFT depending on the internal stress. According to the present invention, an impurity element is introduced into a wiring, or both the introduction of an impurity element and heat treatment are performed, whereby the wiring can be controlled to have a desired internal stress. It is effective that the present invention is particularly applied to a gate electrode. Further, it is possible that the introduction of an impurity element and the heat treatment are conducted to only a desired region to conduct control to attain a desired internal stress.

Claims (56)

1. A method of manufacturing a semiconductor device, comprising:

forming a first semiconductor film and a second semiconductor film on an insulating surface;

forming an insulating film over the first and second semiconductor films;

forming a first conductive film over the first semiconductor film and a second conductive film over the second semiconductor film;

performing a first heat treatment after forming the first and second conductive films;

introducing a first impurity element into the first and second conductive films and the first and second semiconductor films;

introducing a second impurity element into the second conductive film and the second semiconductor film

performing a second heat treatment to change internal stresses in the first conductive film and in the second conductive film, and making a stress that the first semiconductor film receives a tensile stress and making a stress that the second semiconductor film receives a compressive stress; and

manufacturing an n-channel TFT by using the first semiconductor film, the insulating film and the first conductive film and manufacturing a p-channel TFT by using the second semiconductor film, the insulating film and the second conductive film,

wherein the first conductive film constitutes a gate electrode of the n-channel TFT, and

wherein the second conductive film constitutes a gate electrode of the p-channel TFT.

2. The method according to claim 1 , wherein the first impurity element comprises at least one selected from impurity elements imparting n-type conductivity and rare gas elements, and the second impurity element comprises at least one selected from impurity elements imparting p-type conductivity and rare gas elements.

3. The method according to claim 1 , wherein an introduction amount of the first impurity element differs from an introduction amount of the second impurity element.

4. The method according to claim 1 , wherein the impurity element is introduced by at least one selected from the group consisting of a plasma doping method, an ion implantation method and an ion shower doping method.

5. A method of manufacturing a semiconductor device, comprising:

forming a first semiconductor film and a second semiconductor film on an insulating surface;

forming an insulating film over the first and second semiconductor films;

forming a first conductive film over the first semiconductor film and a second conductive film over the second semiconductor film;

performing a first heat treatment after forming the first and second conductive films;

introducing a first impurity element into the first and second conductive films and the first and second semiconductor films;

introducing a second impurity element into the second conductive film and the second semiconductor film

performing a second heat treatment to change internal stresses in the first conductive film and in the second conductive film and making a stress that the first semiconductor film receives a tensile stress stronger than a stress that the second semiconductor film receives; and

manufacturing an n-channel TFT by using the first semiconductor film, the insulating film and the first conductive film and manufacturing a p-channel TFT by using the second semiconductor film, the insulating film and the second conductive film,

wherein the first conductive film constitutes a gate electrode of the n-channel TFT, and

wherein the second conductive film constitutes a gate electrode of the p-channel TFT.

6. The method according to claim 5 , wherein the first impurity element comprises at least one selected from impurity elements imparting n-type conductivity and rare gas elements, and the second impurity element comprises at least one selected from impurity elements imparting p-type conductivity and rare gas elements.

7. The method according to claim 5 , wherein an introduction amount of the first impurity element differs from an introduction amount of the second impurity element.

8. The method according to claim 5 , wherein the impurity element is introduced by at least one selected from the group consisting of a plasma doping method, an ion implantation method and an ion shower doping method.

9. A method of manufacturing a semiconductor device, comprising:

forming a first semiconductor film and a second semiconductor film on an insulating surface;

forming an insulating film over the first and second semiconductor films;

forming a first conductive film over the first semiconductor film and a second conductive film over the second semiconductor film;

introducing a first impurity element into the first and second conductive films and the first and second semiconductor films;

introducing a second impurity element into the second conductive film and the second semiconductor film;

performing a heat treatment to change internal stresses in the first conductive film and in the second conductive film, and making a stress that the first semiconductor film receives a tensile stress and making a stress that the second semiconductor film receives a compressive stress; and

manufacturing an n-channel TFT by using the first semiconductor film, the insulating film and the first conductive film and manufacturing a p-channel TFT by using the second semiconductor film, the insulating film and the second conductive film,

wherein the first conductive film constitutes a gate electrode of the n-channel TFT, and

wherein the second conductive film constitutes a gate electrode of the p-channel TFT.

10. The method according to claim 9 , wherein the first impurity element comprises at least one selected from impurity elements imparting n-type conductivity and rare gas elements, and the second impurity element comprises at least one selected from impurity elements imparting p-type conductivity and rare gas elements.

11. The method according to claim 9 , wherein an introduction amount of the first impurity element differs from an introduction amount of the second impurity element.

12. The method according to claim 9 , wherein the impurity element is introduced by at least one selected from the group consisting of a plasma doping method, an ion implantation method and an ion shower doping method.

13. The method according to claim 9 , wherein the heat treatment is performed by at least one of thermal annealing methods using an annealing furnace, an RTA and a laser annealing.

14. A method of manufacturing a semiconductor device, comprising:

forming a first semiconductor film and a second semiconductor film on an insulating surface;

forming an insulating film over the first and second semiconductor films;

forming a first conductive film over the first semiconductor film and a second conductive film over the second semiconductor film;

introducing a first impurity element into the first and second conductive films and the first and second semiconductor films;

introducing a second impurity element into the second conductive film and the second semiconductor film;

performing a heat treatment to change internal stresses in the first conductive film and in the second conductive film and making a stress that the first semiconductor film receives a tensile stress stronger than a stress that the second semiconductor film receives; and

manufacturing an n-channel TFT by using the first semiconductor film, the insulating film and the first conductive film and manufacturing a p-channel TFT by using the second semiconductor film, the insulating film and the second conductive film,

wherein the first conductive film constitutes a gate electrode of the n-channel TFT, and

wherein the second conductive film constitutes a gate electrode of the p-channel TFT.

15. The method according to claim 14 , wherein the first impurity element comprises at least one selected from impurity elements imparting n-type conductivity and rare gas elements, and the second impurity element comprises at least one selected from impurity elements imparting p-type conductivity and rare gas elements.

16. The method according to claim 14 , wherein an introduction amount of the first impurity element differs from an introduction amount of the second impurity element.

17. The method according to claim 14 , wherein the impurity element is introduced by at least one selected from the group consisting of a plasma doping method, an ion implantation method and an ion shower doping method.

18. The method according to claim 14 , wherein the heat treatment is performed by at least one of thermal annealing methods using an annealing furnace, an RTA and a laser annealing.

Assignments (1)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Apr 26, 2002
From: ARAO, TATSUYA
To: SEMICONDUCTOR ENERGY LABORATORY CO., LTD.
Reel/Frame 012840/0996 →
Priority Claims (1)
JP 2001-130639 · Apr 27, 2001 · national
Continuity (1)
Related Publication 20020179908A1 · Dec 5, 2002