IP Library › Granted Patent US 6,661,040
Granted Patent Utility
US 6,661,040 · Confirmation No. 9178

SEMICONDUCTOR DEVICE WITH INSULATING GATE SURROUNDED BY IMPURITY LAYERS

Inventor: Hiroyuki Takashino
Patented Case View Patent ↗ View Publication ↗
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 Code Description Pages PDF
2003-08-11 IFEE Issue Fee Payment (PTO-85B) 1 View
2003-04-17 C.AD Change of Address 1 View
2002-05-03 TRNA Transmittal of New Application 2 View
2002-05-03 ADS Application Data Sheet 2 View
2002-05-03 SPEC Specification 19 View
2002-05-03 CLM Claims 3 View
2002-05-03 ABST Abstract 1 View
2002-05-03 DRW Drawings-only black and white line drawings 13 View
2002-05-03 OATH Oath or Declaration filed 3 View
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Quick Facts
Patent No.
US 6,661,040
App. No.
10/137,289
Filed
2002-05-03
Granted
2003-12-09
Pub. No.
US20030011007A1
Art Unit
2814
PTA
0 days