Dual trench isolation using single critical lithographic patterning

1. A method, comprising:

forming a mask layer on a substrate having a first area and a second area;

forming a first photoresist layer over said mask layer; patterning the first photoresist layer to form a photoresist-mask layer over the first and second areas with the photoresist-mask layer having a plurality of openings;

etching said mask layer and substrate, between the plurality of openings, to a first depth, to form a plurality of trenches in the substrate, said plurality of trenches defining a plurality of substrate structures covered by the mask layer;

forming a second photoresist layer over said first area and leaving the trenches and substrate structures in the second area exposed; and

etching the exposed trenches in the second area to a second depth, said mask layer protecting the substrate structures in the second area from being etched.

2. The method of claim 1 , wherein forming the mask layer comprises:

depositing a pad oxide layer on a doped monocrystalline silicon substrate; and

depositing a nitride layer on the pad oxide layer.

3. The method of claim 2 , wherein the nitride layer acts as an etch-stop to protect the substrate structures in the second area from being etched.

4. The method of claim 2 , further comprising depositing an anti-reflective coating layer on the nitride layer.

5. The method of claim 4 , wherein the anti-reflective coating layer acts as an etch-stop to protect the substrate structures in the second area from being etched.

6. The method of claim 4 , wherein the anti-reflective coating layer is an oxide/oxynitride composite, between approximately 200 Å to 600 Å thick.

7. A method, comprising:

forming a plurality of shallow isolation trenches in a substrate;

covering a portion of the plurality of shallow isolation trenches, resulting in covered shallow isolation trenches and uncovered shallow isolation trenches; and

etching the uncovered shallow isolation trenches to form a plurality of deep isolation trenches.

8. The method of claim 7 , further comprising forming a mask layer on the substrate, including:

depositing a pad oxide layer on a doped monocrystalline silicon substrate;

depositing a nitride layer on the pad oxide layer; and

depositing an anti-reflective coating layer on the nitride layer.

9. The method of claim 8 , wherein the anti-reflective coating layer is an oxide/oxynitride composite, between approximately 200 Å to 600Å thick.

10. The method of claim 8 , further comprising:

depositing a first photoresist layer on the mask layer;

patterning the first photoresist layer using a critical photolithography process, to form a plurality of openings in the first photoresist layer; and

etching the mask layer and substrate, between the plurality of openings, to form a plurality of shallow isolation trenches in the substrate, said plurality of shallow isolation trenches defining a plurality of active regions between the trenches, the plurality of active regions covered by the mask layer.

11. The method of claim 10 , further comprising:

removing the first photoresist layer;

forming a second photoresist layer, using a non-critical lithography process, to cover a region of the shallow isolation trenches, thus forming a plurality of covered shallow isolation trenches and covered active regions, and a plurality of uncovered shallow isolation trenches and uncovered active regions; and

etching the uncovered shallow isolation trenches to form a plurality of deep isolation trenches, wherein said deep isolation trenches are aligned to the covered shallow isolation trenches without mis-registration, and said mask layer acting as an etch-stop to protect the uncovered active regions during etching.

12. A method, comprising:

forming a mask layer on a substrate;

patterning a first photoresist layer on the mask layer;

etching the mask layer and substrate to a first depth, forming a plurality of shallow isolation trenches in the substrate, said plurality of shallow isolation trenches defining a plurality of masked active regions between the trenches, said masked active regions masked by the mask layer;

removing the first photoresist layer;

forming a second photoresist layer to cover a region of the shallow isolation trenches and masked active regions, thus forming a region of covered shallow isolation trenches and masked active regions and a region of uncovered shallow isolation trenches and masked active regions; and

etching the uncovered shallow isolation trenches to a second depth to form a plurality of deep isolation trenches, said mask layer acting as an etch-stop to protect the uncovered active regions during etching, the plurality of uncovered masked active regions being directly aligned to the plurality of covered masked active regions.

13. The method of claim 12 , wherein forming the mask layer comprises:

depositing a pad oxide layer on a doped monocrystalline silicon substrate; and

depositing a nitride layer on the pad oxide layer.

14. The method of claim 13 , wherein the nitride layer acts a an etch-stop to protect the uncovered active regions from being etched when the plurality of deep isolation trenches are being etched.

15. The method of claim 13 , further comprising depositing a anti-reflective coating layer on the nitride layer.

16. The method of claim 15 , wherein the anti-reflective coating layer is an oxide/oxynitride composite, between approximately 200 Å to 600 Å thick.

17. The method of claim 15 , wherein the anti-reflective coating layer acts as an etch-stop to protect the uncovered active regions from being etched when the plurality of deep isolation trenches are being etched.

18. An isolation structure, comprising:

a first area and a second area;

a plurality of shallow isolation trenches in the first area; and

a plurality of deep isolation trenches in the second area, the deep isolation trenches and the shallow isolation trenches being perfectly aligned.

19. The isolation structure of claim 18 , wherein the plurality of shallow trenches are between approximately 1000 Å to 2000 Å in depth.

20. The isolation structure of claim 18 , wherein the plurality of deep isolation trenches are between approximately 3000Å to 6000 Å in dept.

21. The method of claim 1 , wherein patterning the first photoresist layer comprises a critical lithography process.

22. The method of claim 2 , wherein etching said mask layer and substrate comprises etching the nitride layer using at least one of HBr, C2F6, or CHF3.

23. The method of claim 2 , wherein etching said mask layer and substrate layer comprises etching the pad oxide layer using at least one of HBr, Cl2, CF4, or O2.

24. The method of claim 2 , wherein etching said mask layer and substrate layer comprises etching the doped monocrystalline silicon substrate using at least one of HBr, Cl2, CF4, He, or O2.

25. The method of claim 1 , wherein the first depth is about 1000 to 2000 angstroms.

26. The method of claim 1 , wherein forming the second photoresist layer comprises a non critical lithography process.

27. The method of claim 1 , wherein the first area comprises a memory array where memory devices may be constructed.

28. The method of claim 1 , wherein the second area comprises a periphery area where logic devices may be constructed.

29. The method of claim 7 , wherein forming a plurality of shallow isolation trenches comprises a lithography process and an etch process.

30. The method of claim 7 , wherein covering a portion of the plurality of shallow isolation trenches comprises a lithography process.

31. The method of claim 29 , wherein the lithography process comprises a critical lithography process.

32. The method of claim 30 , wherein the lithography process comprises a non critical lithography process.