IP Library Granted Patent US 7,028,284
Granted Patent B2
US 7,028,284 · App. 10/147,280 · Granted Apr 11, 2006

Convergence technique for model-based optical and process correction

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,028,284
App. No.
10/147,280
Granted
Apr 11, 2006
Kind
B2
Abstract

Layout correction is accomplished using a forward mapping technique. Forward mapping refers to mapping of fragments from a reticle layout to a target layout, while backward mapping refers to mapping of fragments from the target layout to the reticle layout. Forward mapping provides a technique for making an unambiguous mapping for each reticle fragment to a corresponding target layout fragment. The mapping does not necessarily provide a one-to-one correspondence between reticle fragments and target layout fragments. That is, multiple reticle layout fragments can map to a single target layout fragment. An edge placement error for the target layout fragments is used to make positioning corrections for the corresponding reticle fragment(s). Edge placement error can be determined, for example, with a simulation process that simulates a manufacturing process using the reticles.

Claims (73)

1. A method comprising:

analyzing a layout of an integrated device layer to identify one or more structures;

performing rule-based correction to generate modified reticle layouts by modifying one or more reticle layouts corresponding to the integrated device layer by adding assist features to layout elements having dimensions less than or equal to a predetermined threshold; and

performing model-based correction on the modified reticle layouts by;

modifying a placement of one or more fragments of the modified reticle layouts.

2. The method of claim 1 , wherein performing model-based correction further comprises:

(a) mapping one or more fragments of multiple reticle layouts to a target layout representing a desired integrated device layer;

(b) comparing the target layout to a simulated layer of an integrated device to be manufactured;

(c) determining an error metric for one or more fragments based, at least in part, on the comparison of the simulated layer and the target layout; and

(d) modifying the placement of one or more fragments of the modified reticle layouts based, at least in part, on the error metric of the corresponding fragment of the target layer.

3. The method of claim 2 wherein the error metric comprises an edge placement error.

4. The method of claim 2 wherein each fragment of the modified reticles is mapped to a corresponding fragment of the simulated layer and further wherein multiple reticle layout fragments can be mapped to a single simulated layer fragment.

5. The method of claim 2 wherein (b) through (d) are repeated until each error metric is less than a predetermined threshold.

6. The method of claim 2 wherein the modified reticles are to be used for phase shifting manufacturing techniques.

7. The method of claim 1 wherein the integrated device is an integrated circuit.

8. A method comprising:

analyzing a layout of an integrated device layer to identify one or more structures;

performing rule-based correction to generate modified reticle layouts by modifying one or more reticle layouts corresponding to the integrated device layer by adding a hammer head structure to one or more line ends; and

performing model-based correction on the modified reticle layouts.

9. A method comprising:

analyzing a layout of an integrated device layer to identity one or more structures;

performing rule-based correction to generate modified reticle layouts by modifying one or more reticle layouts corresponding to the integrated device layer by adding a serif structure to one or more line corners; and

performing model-based correction on the modified reticle layouts.

10. A set of reticles to be used to manufacture an integrated device, the set of reticles manufactured according to the method of claim 1 , 8 , or 9 .

11. A machine-readable medium having stored thereon data to describe a set of reticles having layouts generated according to the method of claim 1 , 8 , or 9 .

12. A computer data signal carrying data to describe a set of reticles having layouts generated according to the method of claim 1 , 8 , or 9 .

13. An integrated device manufactured using reticles generated according to the method of claim 1 , 8 , or 9 .

14. A machine-readable medium having stored thereon sequences of instructions that, when executed, cause one or more electronic systems to:

analyze a layout of an integrated device layer to identify one or more structures;

perform rule-based correction to generate modified reticle layouts by modifying one or more reticle layouts corresponding to the integrated device layer by adding assist features to layout elements having dimensions less than or equal to a predetermined threshold; and

perform model-based correction on the modified reticle layouts by:

modifying a placement of one or more fragments of the modified reticle layouts.

15. The method machine-readable medium of claim 14 , wherein the sequences of instructions that cause the one or more electronic devices to perform model-based correction comprises sequences of instructions that, when executed, cause the one or more electronic systems to:

(a) map one or more fragments of modified reticle layouts to a target layout representing a desired integrated device layer;

(b) compare the target layout to a simulated layer of an integrated device to be manufactured;

(c) determine an error metric for one or more fragments based, at least in part, on the comparison of the simulated layer and the target layout; and

(d) modify the placement of one or more fragments of the modified reticle layouts based, at least in part, on the error metric of the corresponding fragment of the target layer.

16. The machine-readable medium of claim 15 wherein the error metric comprises an edge placement error.

17. The machine-readable medium of claim 15 wherein each fragment of the modified reticles is mapped to a corresponding fragment of the simulated layer and further wherein multiple reticle layout fragments can be mapped to a single simulated layer fragment.

18. The machine-readable medium of claim 15 wherein (b) through (d) are repeated until each edge placement error is less than a predetermined threshold.

19. The machine-readable medium of claim 15 wherein the modified reticles are to be used for phase shifting manufacturing techniques.

20. The machine-readable medium of claim 14 wherein the integrated device is an integrated circuit.

21. A machine-readable medium having stored thereon sequences of instructions that, when executed, cause one or more electronic systems to:

analyze a layout of an integrated device layer to identify one or more structures;

perform rule-based correction to generate modified reticle layouts by modifying one or more reticle layouts corresponding to the integrated device layer by adding a hammer head structure to one or more line ends; and

perform model-based correction on the modified reticle layouts.

22. A machine-readable medium having stored thereon sequences of instructions that, when executed, cause one or more electronic systems to:

analyze a layout of an integrated device layer to identify one or more structures;

perform rule-based correction to generate modified reticle layouts by modifying one or more reticle layouts corresponding to the integrated device layer by adding a serif structure to one or more line corners; and

perform model-based correction on the modified reticle layouts.

23. A computer data signal embodied in a data communications medium shared among a plurality of network devices comprising sequences of instructions that, when executed, cause one or more electronic systems to:

analyze a layout of an integrated device layer to identify one or more structures;

perform rule-based correction to generate modified reticle layouts by modifying one or more reticle layouts corresponding to the integrated device layer by adding assist features to layout elements having dimensions less than or equal to a predetermined threshold; and

perform model-based correction on the modified reticle layouts by:

modifying a placement of one or more fragments of the modified reticle layouts.

24. The computer data signal of claim 23 , wherein the sequences of instructions that cause the one or more electronic devices to perform model-based correction comprises sequences of instructions that, when executed, cause the one or more electronic systems to:

(a) map one or more fragments of multiple reticle layouts to a target layout representing a desired integrated device layer;

(b) compare the target layout to a predicted layer of an integrated device to be manufactured;

(c) determine an error metric for one or more fragments based, at least in part, on the comparison of the simulated layer and the target layout; and

(d) modify the placement of one or more fragments of the modified reticle layouts based, at least in part, on the error metric of the corresponding fragment of the target layer.

25. The computer data signal of claim 24 wherein the error metric comprises an edge placement error.

26. The computer data signal of claim 24 wherein each fragment of the modified reticles is mapped to a corresponding fragment of the simulated layer and further wherein multiple reticle layout fragments can be mapped to a single simulated layer fragment.

27. The computer data signal of claim 24 wherein (b) through (d) are repeated until each edge placement error is less than a predetermined threshold.

28. The computer data signal of claim 24 wherein the modified reticles are to be used for phase shifting manufacturing techniques.

29. The computer data signal of claim 23 wherein the integrated device is an integrated circuit.

30. A computer data signal embodied in a data communications medium shared among a plurality of network devices comprising sequences of instructions that, when executed, cause one or more electronic systems to:

analyze a layout of an integrated device layer to identify one or more structures;

perform rule-based correction to generate modified reticle layouts by modifying one or more reticle layouts corresponding to the integrated device layer by adding a hammer head structure to one or more line ends; and

perform model-based correction on the modified reticle layouts.

31. A computer data signal embodied in a data communication, medium shared among a plurality of network devices comprising sequences of instructions that, when executed, cause one or more electronic systems to:

analyze a layout of an integrated device layer to identify one or more structures;

perform rule-based correction to generate modified reticle layouts by modifying one or more reticle layouts corresponding to the integrated device layer by adding a serif structure to one or more line corners; and

perform model-based correction on the modified reticle layouts.

Assignments (2)
MERGER AND CHANGE OF NAME Recorded Aug 8, 2022
From: MENTOR GRAPHICS CORPORATION; SIEMENS INDUSTRY SOFTWARE INC.
To: SIEMENS INDUSTRY SOFTWARE INC.
Reel/Frame 060740/0084 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 5, 2022
From: COBB, NICOLAS B.; SAHOURIA, EMILE
To: MENTOR GRAPHICS CORPORATION
Reel/Frame 060734/0870 →
Continuity (2)
Continuation 0961321400 · Jul 10, 2000
Related Publication 20040216065A1 · Oct 28, 2004