Patent Application
Utility
App. No. 10/166,196
· Confirmation No. 5855
Method for fabricating a semiconductor structure including a metal oxide interface with silicon
Expressly Abandoned -- During Examination
View Publication ↗
|
⬇ PDF
|
Code | Description | Pages | ||
|---|---|---|---|---|---|
| 2002-06-11 | TRNA |
Transmittal of New Application | 2 | View | |
| 2002-06-11 | ADS |
Application Data Sheet | 3 | View | |
| 2002-06-11 | SPEC |
Specification | 13 | View | |
| 2002-06-11 | CLM |
Claims | 8 | View | |
| 2002-06-11 | ABST |
Abstract | 1 | View | |
| 2002-06-11 | DRW |
Drawings-only black and white line drawings | 2 | View | |
| 2002-06-11 | OATH |
Oath or Declaration filed | 3 | View |
Inventors
Attorneys & Agents of Record
Classification
USPC
438/497
H10P95/50
C30B25/02
C30B29/16
C30B29/32
Prosecution
- Examiner
- SARKAR, ASOK K
- Art Unit
- 2829
- Customer No.
- 22850
- Docket No.
- 224193US99CONT
- Confirmation No.
- 5855
Publication
- Pub. No.
- US20020146895A1
- Pub. Date
- 2002-10-10
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this application's details
Quick Facts
- App. No.
- 10/166,196
- Filed
- 2002-06-11
- Pub. No.
- US20020146895A1
- Examiner
- SARKAR, ASOK K
- Art Unit
- 2829
External Links