IP Library Granted Patent US 7,734,439
Granted Patent B2
US 7,734,439 · App. 10/178,950 · Granted Jun 8, 2010

System and process for calibrating pyrometers in thermal processing chambers

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Quick Facts
Patent No.
US 7,734,439
App. No.
10/178,950
Granted
Jun 8, 2010
Kind
B2
Abstract

A method and system for calibrating temperature measurement devices, such as pyrometers, in thermal processing chambers are disclosed. According to the present invention, the system includes a calibrating light source that emits light energy onto a substrate contained in the thermal processing chamber. A light detector then detects the amount of light that is being transmitted through the substrate. The amount of detected light energy is then used to calibrate a temperature measurement device that is used in the system.

Claims (15)

1. A calibration wafer intended to be used for calibrating temperature measurement devices in thermal processing chambers, the calibration wafer comprising:

a wafer having a diameter of at least 200 mm, the wafer comprising a first region and a second region, the thickness of the wafer at the first region being less than about 150 microns and, the first region having a temperature dependent optical transmission characteristic so that the wafer can be use for calibrating temperature measurement devices;

wherein the thickness of the wafer at the first region is less than the thickness of the wafer at the second region;

wherein at a calibration temperature, the first region is transparent to infrared radiation and the second region is opaque to infrared radiation.

2. A calibration wafer as defined in claim 1 , wherein the thickness of the wafer at the first region is less than about 100 microns.

3. A calibration wafer as defined in claim 1 , wherein the wafer includes at least two first regions.

4. A calibration wafer as defined in claim 1 , wherein the first region comprises silicon.

5. A calibration wafer as defined in claim 1 , wherein the wafer is made from silicon.

6. A calibration wafer as defined in claim 1 , wherein the wafer includes a coating on at least one side of the wafer.

7. A calibration wafer as defined in claim 1 , wherein the first region comprises a thin piece of material placed over a hole defined by the wafer.

8. A calibration wafer as defined in claim 1 , wherein the first region is surrounded by walls, the walls having an incline surface.

9. A calibration wafer as defined in claim 1 , wherein wafer includes a plurality of first regions grouped together.

10. The calibration wafer as defined in claim 1 , wherein the calibration temperature is greater than or equal to about 850° C.

11. The calibration wafer as defined in claim 1 , wherein at the calibration temperature, the first region is transparent to radiation having a wavelength in the range of about 1.0 micron to about 2.0 microns and the second region is opaque to radiation having a wavelength in the range of about 1.0 micron to about 2.0 microns.

12. A calibration wafer as defined in claim 7 , wherein the wafer includes multiple locations where the plurality of thin areas have been grouped together.

Assignments (3)
RELEASE OF SECURITY INTEREST Recorded Apr 15, 2021
From: EAST WEST BANK
To: MATTSON TECHNOLOGY, INC.
Reel/Frame 055950/0452 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 30, 2019
From: MATTSON TECHNOLOGY, INC.
To: MATTSON TECHNOLOGY, INC.; BEIJING E-TOWN SEMICONDUCTOR TECHNOLOGY, CO., LTD
Reel/Frame 050582/0796 →
SECURITY INTEREST Recorded Aug 27, 2018
From: MATTSON TECHNOLOGY, INC.
To: EAST WEST BANK
Reel/Frame 046956/0348 →