IP Library Granted Patent US 6,920,539
Granted Patent B2
US 6,920,539 · App. 10/183,234 · Granted Jul 19, 2005

Method and system to retrieve information

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Quick Facts
Patent No.
US 6,920,539
App. No.
10/183,234
Granted
Jul 19, 2005
Kind
B2
Abstract

Briefly, in accordance with an embodiment of the invention, a method and system to retrieve information from a memory is provided. The method may include transferring information from the memory in response to at least two synchronous burst read requests using pipelining.

Claims (18)

1. A method comprising:

sensing data in a memory in response to a first burst read request;

transferring out of the memory less than all of the data; and

interrupting the transfer of sensed data in response to receipt of a second burst read request.

2. The method of claim 1 including sensing data in response to the second burst read request after interrupting the transfer of sensed data in response to the first burst read request.

3. The method of claim 1 including simultaneously sensing and transferring data for said second burst read request.

4. An article comprising a computer medium storing instructions that, if executed, enable a processor-based system to:

sense data in a memory in response to a first burst read request;

transfer out of the memory less than all of the data; and

interrupt the transfer of sensed data in response to receipt of a second burst read request.

5. The article of claim 4 further storing instructions that, if executed, enable the processor-based system to sense data in response to the second burst read request after interrupting the transfer of sensed data in response to the first burst read request.

6. The article of claim 4 further storing instructions that, if executed, enable the processor-based system to simultaneously sense and transfer data for said second burst read request.

7. A system comprising:

a controller; and

a memory coupled to said controller storing instructions to cause said controller to sense data in response to a first burst read request, transfer out of the memory less than all of the data, and interrupt the transfer of sensed data in response to receipt of a second burst read request.

8. The system of claim 7 wherein said memory includes a memory array storing the sensed data.

9. The system of claim 7 wherein said memory stores instructions to enable the controller to sense data in response to the second burst read request after interrupting the transfer of sensed data in response to the first burst read request.

10. The system of claim 7 wherein said memory further stores instructions that enable the processor-based system to simultaneously sense and transfer data out of said memory for said second burst read request.

Assignments (2)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 17, 2023
From: INTEL CORPORATION
To: INTEL NDTM US LLC
Reel/Frame 064928/0832 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 9, 2002
From: QAWAMI, SHEKOUFEH; RAJGURU, CHAITANYA S.; TALREJA, SANJAY S.
To: INTEL CORPORATION
Reel/Frame 013173/0522 →