Microcontroller having an embedded non-volatile memory array with read protection for the array or portions thereof
A single integrated circuit microcontroller 10 includes an embedded erasable/programmable non-volatile memory 12 having a read protection capability. Microcontroller 10 can operate within a special mode in which external circuits may access memory 12 by use of input/output pins 18 . When microcontroller 10 activates this special mode, a read protection flag 13 within memory 12 is checked. The read protection flag 13 may be set during production of the microcontroller 10 after instructional data or firmware has been installed onto memory 12 . If the read protection flag 13 has been set, only certain portions of the memory 12 may be read, depending upon the value of the read protection flag 13.
1. A single integrated circuit microcontroller comprising:
an erasable/programmable non-volatile flash memory unit, partitioned into a plurality of sectors;
a read protection flag stored in one of said plurality of sectors of said flash memory unit;
a logic portion which is adapted to detect when a read mode external to said microcontroller is activated, to check said read protection flag upon detecting said read mode, and to allow external access to read portions, if any, of said non-volatile memory unit in response to said protection flag; and
wherein said read protection flag set to one of a plurality of increasing values; and wherein said logic portion allows external access to read increasing portions of said flash memory unit in response to increasing values of said read protection flag.
2. The microcontroller of claim 1 further comprising:
at least one input/output pin, and wherein said logic portion comprises:
switching logic which is adapted to selectively connect and disconnect said at least one input/output pin to and from said non-volatile memory unit; and
control logic which is communicatively coupled to said switching logic and which is adapted to detect when said read mode is activated, to check said read protection flag upon detecting said read mode, and to determine the portion of said flash memory unit to be read, said control logic being further adapted to selectively communicate signals to said switching logic, effective to connect said at least one input/output pin to said non-volatile memory only if said read mode is activated and said portion of said flash memory unit to be read is allowed.
3. The microcontroller of claim 1 further comprising a micro-control unit which is selectively connected to said input/output pins and to said non-volatile memory unit by use of said switching logic.
4. The microcontroller of claim 3 further comprising a random access memory unit which is communicatively coupled to said micro-control unit.
5. The microcontroller of claim 3 further comprising a read-only memory unit which is communicatively coupled to said micro-control unit.
6. The microcontroller of claim 4 wherein said micro-control unit comprises a microprocessor.
7. The microcontroller of claim 1 wherein said control logic is communicatively coupled to said at least one input/output pin and is adapted to detect said read mode upon sensing a predetermined sequence of signals communicated to said at least one input/output pin.
8. A single integrated circuit microcontroller comprising:
an erasable/programmable non-volatile memory unit including a first portion adapted to store certain firmware, said memory unit partitioned into a plurality of sectors;
a read protection flag stored in one of said plurality of sectors of said non-volatile memory unit;
a logic portion which is adapted to detect when a read mode external to said microcontroller is activated, to check said read protection flag upon detecting said read mode, and to allow external access to read portions of said non-volatile memory unit other than said first portion; and
wherein said read protection flag is set to one of a plurality of increasing values; and wherein said logic portion allows external access to read increasing portions of said non-volatile memory unit in response to increasing values of said read protection flag.
9. The microcontroller of claim 8 further comprising:
erase circuit for erasing all of said first portion of said non-volatile memory unit.
10. The microcontroller of claim 9 further comprising:
programming circuit for reprogramming said read protection flag without first erasing said read protection flag; and
wherein said reprogrammed read protection flag allows external access to read portions of said non-volatile memory unit other than a second portion which is greater than said first portion.
11. A method for providing read protection for a microcontroller including an embedded programmable non-volatile memory unit having a first portion that stores certain firmware, and a read mode in which said programmable non-volatile memory unit is externally accessible, said method comprising the steps of:
storing a read protection flag, set to one of a plurality of increasing values, in said microcontroller;
detecting when said read mode is activated;
checking said read protection flag when said read mode is activated; and
allowing external access to read increasing portions of said memory unit in response to increasing values of said read protection flag.