Semiconductor wafer with improved local flatness, and method for its production
View Patent ↗A process for producing semiconductor wafers comprises simultaneous grinding of both sides of the semiconductor wafers in a single step, 1S-DDG, wherein this grinding is the only material-removing mechanical machining step which is used to machine the surfaces of the semiconductor wafers. This process produces semiconductor wafers with improved geometry and nanotopology.
1. A semiconductor wafer produced by simultaneously grinding both sides of the semiconductor wafer in one step, 1S-DDG, forming a cross ground pattern of grinding marks on each side of the wafers using ceramic-bonded grinding wheels, and measuring the thickness of the workpiece during grinding, said wafer having a deviation from a desired target thickness THK of ΔTHK≦0.75 μm, a geometry value of TTV≦1 μm and a rotational symmetry of ΔROT≦0.5 μm.
2. A semiconductor wafer having a maximum unevenness on a wafer front surface of less than 20 nm in any desired measurement field with a size of 2 mm×2 mm and of less than 50 nm in any desired measurement field of a size of 10 mm×10 mm.
3. The semiconductor wafer of claim 2 , wherein the maximum unevenness criteria are satisfied apart from an edge exclusion of 0.5 mm.