IP Library Granted Patent US 7,253,457
Granted Patent B2
US 7,253,457 · App. 10/217,094 · Granted Aug 7, 2007

Semiconductor device with external terminals arranged symmetrically with respect to a normal external terminal arrangement

View Patent ↗
Loading inventors, assignments & file history…
Monitor This Case
Get email alerts when status or documents change.
Order Certified Copies
Most orders are placed with the USPTO same day — all within 24 business hours.
Order via The Patent Place →
Pre-filled with this patent's details
Quick Facts
Patent No.
US 7,253,457
App. No.
10/217,094
Granted
Aug 7, 2007
Kind
B2
Abstract

A semiconductor device, which may be changed to a mirror package after the assembly without having to reinstall bonding wires, comprises: a plurality of fixed external terminals which include a power supply external terminal and a ground potential external terminal and which are arranged symmetrically in fixed positions; a plurality of variable external terminals of different types which are arranged symmetrically; a plurality of reverse-polarity selection external terminals which are symmetrically arranged in fixed positions, and a signal switching circuit which switches the arrangement of the symmetrically arranged variable external terminal according to the setting of the selection terminal.

Claims (46)

1. A semiconductor device comprising:

at least three sets of separate and distinct external terminals, said sets of external terminals comprising:

a plurality of fixed external terminals arranged symmetrically to each other in fixed positions;

a plurality of variable external terminals being different types and arranged symmetrically to each other;

a plurality of selection external terminals arranged symmetrically to each other in fixed positions and set up to have a reverse polarity to each other; and

a signal switching circuit that switches an arrangement of said variable external terminals arranged symmetrically to each other according to a setting of said selection external terminals,

wherein said signal-switching circuit is provided inside a command decoder that analyzes a plurality of control signals.

2. The semiconductor device as defined in claim 1 wherein said fixed external terminals are arranged in laterally symmetrical positions to each other, said variable external terminals are arranged in laterally symmetrical positions to each other, and said selection external terminals are arranged in laterally symmetrical positions.

3. The semiconductor device as defined in claim 1 wherein said fixed external terminals are arranged in vertically symmetrical positions to each other, said variable external terminals are arranged in vertically symmetrical positions to each other, and said selection external terminals are arranged in vertically symmetrical positions.

4. The semiconductor device as defined in claim 1 wherein said fixed external terminals include a plurality of first fixed external terminals and a plurality of second fixed external terminals, said first fixed external terminals being unable to be switched by said signal switching circuit and being the same type of external terminals arranged symmetrically to each other, symmetrically arranged terminals of said second fixed external terminals being usable for an opposite signal.

5. The semiconductor device as defined in claim 4 wherein said first fixed external terminals include an external terminal for receiving a power supply voltage and an external terminal for receiving a ground potential.

6. The semiconductor device as defined in claim 4 wherein said second fixed external terminals include external terminals for data signals of a memory.

7. A semiconductor device comprising:

at least three sets of separate and distinct external terminals, said sets of external terminals comprising:

a plurality of fixed external terminals arranged symmetrically to each other in fixed positions;

a plurality of variable external terminals being different types and arranged symmetrically to each other;

a plurality of selection external terminals arranged symmetrically to each other in fixed positions and set up to have a reverse polarity to each other; and

a signal switching circuit that switches an arrangement of said variable external terminals arranged symmetrically to each other according to a setting of said selection external terminals,

wherein said signal-switching circuit is provided inside an address decoder that analyzes a plurality of address signals of a memory.

8. The semiconductor device as defined in claim 7 wherein said fixed external terminals are arranged in laterally symmetrical positions to each other, said variable external terminals are arranged in laterally symmetrical positions to each other, and said selection external terminals are arranged in laterally symmetrical positions.

9. The semiconductor device as defined in claim 7 wherein said fixed external terminals are arranged in vertically symmetrical positions to each other, said variable external terminals are arranged in vertically symmetrical positions to each other, and said selection external terminals are arranged in vertically symmetrical positions.

10. The semiconductor device as defined in claim 7 wherein said fixed external terminals include a plurality of first fixed external terminals and a plurality of second fixed external terminals, said first fixed external terminals being unable to be switched by said signal switching circuit and being the same type of external terminals arranged symmetrically to each other, symmetrically arranged terminals of said second fixed external terminals being usable for an opposite signal.

11. The semiconductor device as defined in claim 10 wherein said first fixed external terminals include an external terminal for receiving a power supply voltage and an external terminal for receiving a ground potential.

12. The semiconductor device as defined in claim 10 wherein said second fixed external terminals include external terminals for data signals of a memory.

13. A semiconductor device comprising:

at least two sets of separate and distinct external terminals, said sets of external terminals comprising:

a plurality of fixed external terminals arranged symmetrically to each other in fixed positions;

a plurality of variable external terminals being different types and arranged symmetrically to each other; and

a signal switching circuit that switches an arrangement of said variable external terminals arranged symmetrically to each other on the basis of an internal signal indicating a section of the device,

wherein said signal-switching circuit is provided inside a command decoder that analyzes a plurality of control signals.

14. The semiconductor device as defined in claim 13 wherein said fixed external terminals are arranged in laterally symmetrical positions to each other and said variable external terminals are arranged in laterally symmetrical positions to each other.

15. The semiconductor device as defined in claim 13 wherein said fixed external terminals are arranged in vertically symmetrical positions to each other and said variable external terminals are arranged in vertically symmetrical positions to each other.

16. The semiconductor device as defined in claim 13 wherein said fixed external terminals include a plurality of first fixed external terminals and a plurality of second fixed external terminals, said first fixed external terminals being unable to be switched by said signal switching circuit and being the same type of external terminals arranged symmetrically to each other, symmetrically arranged terminals of said second fixed external terminals being usable for an opposite signal.

17. The semiconductor device as defined in claim 16 wherein said first fixed external terminals include an external terminal for receiving a power supply voltage and an external terminal for receiving a ground potential.

18. The semiconductor device as defined in claim 16 wherein said fixed external terminals include external terminals for data signals of a memory.

19. A semiconductor device comprising:

at least two sets of separate and distinct external terminals, said sets of external terminals comprising:

a plurality of fixed external terminals arranged symmetrically to each other in fixed positions;

a plurality of variable external terminals being different types and arranged symmetrically to each other; and

a signal switching circuit that switches an arrangement of said variable external terminals arranged symmetrically to each other on the basis of an internal signal indicating a selection of the device,

wherein said signal-switching circuit is provided inside an address decoder that analyzes a plurality of address signals of a memory.

20. The semiconductor device as defined in claim 19 wherein said fixed external terminals are arranged in laterally symmetrical positions to each other and said variable external terminals are arranged in laterally symmetrical positions to each other.

21. The semiconductor device as defined in claim 19 wherein said fixed external terminals are arranged in vertically symmetrical positions to each other and said variable external terminals are arranged in vertically symmetrical positions to each other.

22. The semiconductor device as defined in claim 19 wherein said fixed external terminals include a plurality of first fixed external terminals and a plurality of second fixed external terminals, said first fixed external terminals being unable to be switched by said signal switching circuit and being the same type of external terminals arranged symmetrically to each other, symmetrically arranged terminals of said second fixed external terminals being usable for an opposite signal.

23. The semiconductor device as defined in claim 22 wherein said first fixed external terminals include an external terminal for receiving a power supply voltage and an external terminal for receiving a ground potential.

24. The semiconductor device as defined in claim 22 wherein said fixed external terminals include external terminals fox data signals of a memory.

Assignments (5)
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 21, 2018
From: LONGITUDE SEMICONDUCTOR S.A.R.L.
To: LONGITUDE LICENSING LIMITED
Reel/Frame 046867/0248 →
CHANGE OF NAME Recorded Aug 24, 2016
From: PS5 LUXCO S.A.R.L.
To: LONGITUDE SEMICONDUCTOR S.A.R.L.
Reel/Frame 039793/0880 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 24, 2016
From: PS4 LUXCO S.A.R.L.
To: PS5 LUXCO S.A.R.L.
Reel/Frame 039818/0506 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded May 15, 2014
From: ELPIDA MEMORY, INC.
To: PS4 LUXCO S.A.R.L.
Reel/Frame 032895/0310 →
SECURITY AGREEMENT Recorded Jul 29, 2013
From: PS4 LUXCO S.A.R.L.
To: ELPIDA MEMORY INC.
Reel/Frame 032414/0261 →