IP Library Granted Patent US 6,883,129
Granted Patent B2
US 6,883,129 · App. 10/217,811 · Granted Apr 19, 2005

Electronic circuit and method for testing

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Quick Facts
Patent No.
US 6,883,129
App. No.
10/217,811
Granted
Apr 19, 2005
Kind
B2
Abstract

An integrated circuit is switchable between a normal operating mode and a test mode. A functional circuit and a test pattern converter are both coupled between input contacts, output contacts and a redefinable contact of the integrated circuit. In the test mode respectively the test pattern converter drives the outputs contacts and, dependent on the circuit configuration, the redefinable contact. The test pattern converter is arranged to provide a first and second relation between signals at the input contacts and the output contacts, with the redefinable contact used as an input or output contact respectively, dependent on the circuit configuration. The relations have been selected so as to permit testing of stuck-at and cross-connect errors with the redefinable contact used as input and output contact respectively.

Claims (21)

1. An integrated circuit that is switchable between a normal operating mode and a test mode, the integrated circuit having input contacts, output contacts and a redefinable contact that has an input or output function selected dependent on a circuit configuration, the circuit comprising

a functional circuit and a test pattern converter, both coupled between the input contacts, the output contacts and the redefinable contact; the functional circuit and the test pattern converter, in the normal operating mode and the test mode respectively, driving the outputs contacts and, dependent on the circuit configuration, the redefinable contact, the test pattern converter being arranged to provide a first and second relation between signals at the input contacts and the output contacts, with the redefinable contact used as an input or output contact respectively, dependent on the circuit configuration, the relations having been selected so as to permit testing of stuck-at and cross-connect errors with the redefinable contact used as input and output contact respectively.

2. An integrated circuit according to claim 1 , comprising a controllable coupling enabled or disabled by said circuit configuration, the test pattern converter having first inputs coupled to the input contacts, first outputs coupled to the output contacts, a second input coupled to the redefinable contact and a second output coupled to the redefinable contact via the controllable coupling.

3. An integrated circuit according to claim 2 , the test pattern converter comprising a collection of exclusive or and/or exclusive nor circuits, coupled between the first and second inputs and the first and second outputs, so that the signal at each output depends on an exclusive or of signals from a respective group of the first and second inputs, where each group contains at least two of the input contacts, no two groups being identical or identical but for the second input, and each the first and second inputs belonging to at least one of the groups.

4. An integrated circuit according to claim 3 , wherein the group associated with the second output does not contain the second input.

5. An integrated circuit according to claim 3 , comprising a first and second subconverter and a multiplexer, the first and second sub converter having the first and second input/output relation respectively, outputs of the first and second sub converter being coupled to the output contacts and the input of the controllable coupling, inputs of the first subconverter being coupled to the input contacts and the redefinable contact, inputs of the second subconverter being coupled to the input contacts.

6. An electronic circuit comprising

one or more first integrated circuits having first and second contacts and a test interface for writing and reading test data to the first contacts and second contacts respectively;

a second integrated circuit having input contacts, output contacts and a redefinable contact having an input or output function selected dependent on a circuit configuration;

connections between first contacts and the input contacts, between the second contacts and the output contacts and between the redefinable contact and the first or the second contacts, the second integrated circuit being switchable between a normal operating mode and a test mode, the second integrated circuit comprising a functional circuit and a test pattern converter, both coupled between the input contacts, the output contacts and the redefinable contact, the functional circuit and the test pattern converter, in the normal operating mode and the test mode respectively, driving the outputs contacts and, dependent on the circuit configuration, the redefinable contact, the test pattern converter being arranged to provide a first and second relation between signals at the input contacts and the output contacts, with the redefinable contact used as an input or output contact respectively, dependent on the circuit configuration, the relations having been selected so as to permit testing of stuck-at and cross-connect errors with the redefinable contact used as input and output contact respectively.

7. An electronic circuit according to claim 6 , comprising a controllable coupling enabled or disabled by said circuit configuration the test pattern converter having first inputs coupled to the input contacts, first outputs coupled to the output contacts, a second input coupled to the redefinable contact and a second output coupled to the redefinable contact via the controllable coupling.

8. An electronic circuit according to claim 7 , the test pattern converter comprising a collection of exclusive or and/or exclusive nor circuits, coupled between the first and second inputs and the first and second outputs, so that the signal at each output depends on an exclusive or of signals from a respective group of the first and second inputs, where each group contains at least two of the input contacts, no two groups being identical or identical but for the second contact, and each the first and second inputs belonging to at least one of the groups.

9. An electronic circuit according to claim 8 , wherein

the group associated with the second output does not contain the second input.

10. An electronic circuit according to claim 7 , comprising a first and second subconverter and a multiplexer, the first and second sub converter having the first and second input/output relation respectively, outputs of the first and second sub converter being coupled to the output contacts and the input of the controllable coupling, inputs of the first subconverter being coupled to the input contacts and the redefinable contact, inputs of the second subconverter being coupled to the input contacts.

11. A method of testing an electronic circuit that contains an integrated circuit that is switchable between a normal operating mode and a test mode, the integrated circuit having input contacts, output contacts and a redefinable contact having an input or output function selected dependent on a circuit configuration, the integrated circuit being arranged to provide in the test mode a first and second relation between signals at the input contacts and the output contacts, with the redefinable contact used as an input or output contact respectively, dependent on the circuit configuration, the relations having been selected so as to permit testing of stuck-at and cross-connect errors with the redefinable contact used as input and output contact respectively,

the method comprising

switching the integrated circuit between a first and second input/output relation, between signals at the input contacts and the output contacts, with the redefinable contact used as an input or output contact respectively, dependent on the circuit configuration;

applying a set of successive input signals to the input contacts and, depending on the circuit configuration, to the redefinable contact, so that when the integrated circuit is connected without error normally, each input and output assumes all possible logic values in the set of input signals with their resulting output signals and each difference between signals at any pair of input, any pair of outputs and any pair that consists of both an input and an output assumes all possible logic values in the set of input signals with their resulting output signals;

observing output signals in response to the input signals

detecting whether there are deviations from the output signals that should occur when the integrated circuit is connected without error.

Assignments (6)
RELEASE OF SECURITY INTEREST Recorded Sep 9, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC
To: NXP B.V.
Reel/Frame 050315/0443 →
CHANGE OF NAME Recorded Sep 22, 2017
From: PHILIPS SEMICONDUCTORS INTERNATIONAL B.V.
To: NXP B.V.
Reel/Frame 043951/0436 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2017
From: KONINKLIJKE PHILIPS ELECTRONICS N.V.
To: PHILIPS SEMICONDUCTORS INTERNATIONAL B.V.
Reel/Frame 043955/0001 →
SECURITY AGREEMENT Recorded Jan 22, 2007
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 018806/0201 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Dec 15, 2006
From: KONINKLIJKE PHILIPS ELECTRONICS N.V.
To: NXP B.V.
Reel/Frame 018635/0787 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Nov 8, 2002
From: BIEWENGA, ALEXANDER SEBASTIAN; VAN DE LOGT, LEON MARIA ALBERTUS; DE JONG, FRANCISCUS GERARDUS MARIA; LOUSBERG, GUILLAUME ELISABETH ANDREAS
To: KONINKLIJKE PHILIPS ELECTRONICS N. V.
Reel/Frame 013478/0923 →