IP Library › Assignment 043955/0001
Patent Assignment
Reel/Frame 043955/0001

ASSIGNMENT OF ASSIGNOR'S INTEREST

Recorded: 2017-09-22 Received: 2017-09-22 Pages: 124
Assignor
Assignee
PHILIPS SEMICONDUCTORS INTERNATIONAL B.V.
HIGH TECH CAMPUS 60, EINDHOVEN, NLX, 5656 AG, NETHERLANDS
Covered Applications (100)
VAPOR-PERMEABLE, SUBSTANTIALLY WATER-IMPERMEABLE MULTILAYER ARTICLE
App. No. 15/794,167
→
ADAPTIVE ERASE FAIL BIT CRITERIA
App. No. 15/793,092
→
PERFORMANCE BASED MEMORY BLOCK USAGE
App. No. 15/793,387
→
AUDIBLE ALERTS FOR CO-LOCATED DEVICES
App. No. 15/670,928
→
Automated Banking System
App. No. 15/523,089
→
RESCUE HOIST END-EFFECTOR
App. No. 15/481,711
→
SYSTEMS AND METHODS FOR ESTIMATION OF BUILDING WALL AREA AND PRODUCING A WALL ESTIMATION REPORT
App. No. 13/844,684
→
COMMUNICATION PARTNER APPLIANCE WITH AUTOMATIC SEND MODE ACTIVATION
App. No. 13/737,819
→
COMMUNICATION PARTNER APPLIANCE WITH AUTOMATIC SEND MODE ACTIVATION
App. No. 13/553,675
→
METHOD OF READING A PLURALITY OF NON-CONTACT DATA CARRIERS, INCLUDING AN ANTI-COLLISION SCHEME
App. No. 13/475,778
→
COMMUNICATION PARTNER APPLIANCE WITH AUTOMATIC SEND MODE ACTIVATION
App. No. 13/405,778
→
COMMUNICATION PARTNER APPLIANCE WITH AUTOMATIC SEND MODE ACTIVATION
App. No. 13/250,060
→
COMPRESSION FORECASTING FOR A DEDUPLICATING STORAGE SYSTEM
App. No. 13/174,499
→
TRANSMITTING CIRCUIT FOR A CONTACTLESS COMMUNICATING COMMUNICATION PARTNER DEVICE
App. No. 11/631,808
→
TESTING OF AN INTEGRATED CIRCUIT THAT CONTAINS SECRET INFORMATION
App. No. 12/063,156
→
NON-VOLATILE MEMORY WITH ERASE GATE ON ISOLATION ZONES
App. No. 12/726,087
→
INTEGRATED CIRCUIT WITH MEMORY CELLS COMPRISING A PROGRAMMABLE RESISTOR AND METHOD FOR ADDRESSING MEMORY CELLS COMPRISING A PROGRAMMABLE RESISTOR
App. No. 11/576,459
→
SECURE CARD TERMINAL USING KEYPAD SCANNING SEQUENCE DETERMINED BY CARD
App. No. 10/558,998
→
SECURITY UNIT AND PROTECTION SYSTEM COMPRISING SUCH SECURITY UNIT AS WELL AS METHOD FOR PROTECTING DATA
App. No. 11/631,214
→
SEMICONDUCTOR DEVICE METHOD OF MANFACTURING A QUANTUM WELL STRUCTURE AND A SEMICONDUCTOR DEVICE COMPRISING SUCH A QUANTUM WELL STRUCTURE
App. No. 12/429,348
→
DUAL BIAS CONTROL CIRCUIT
App. No. 11/576,812
→
METHOD OF DISTRIBUTING MULTIMEDIA CONTENT
App. No. 11/574,238
→
An electric device with a layer of conductive material contacted by nanowires
App. No. 11/631,212
→
ELECTRONIC APPARATUS WITH A MICRO-ELECTROMECHANICAL SWITCH MADE OF A PIEZOELETRIC MATERIAL
App. No. 10/584,044
→
ANALOGUE MEASUREMENT OF ALIGNMENT BETWEEN LAYERS OF A SEMICONDUCTOR DEVICE
App. No. 11/575,863
→
SEMICONDUCTOR DEVICE INCLUDING A COUPLED DIELECTRIC LAYER AND METAL LAYER, METHOD OF FABRICATION THEREOF, AND PASSIVATING COUPLING MATERIAL COMPRISING MULTIPLE ORGANIC COMPONENTS FOR USE IN A SEMICONDUCTOR DEVICE
App. No. 12/280,477
→
SEMICONDUCTOR DEVICES WITH A FIELD SHAPING REGION
App. No. 12/177,258
→
ETCH METHOD
App. No. 11/628,517
→
ELECTRONIC DEVICE AND METHOD OF MATCHING THE IMPEDANCE THEREOF
App. No. 12/135,094
→
DYNAMIC BANDWIDTH SHARING
App. No. 11/577,309
→
CAPPING LAYER FORMATION ONTO A DUAL DAMESCENE INTERCONNECT
App. No. 12/065,190
→
CIRCUIT ARRANGEMENT METHOD FOR OBTAINING AN OUTPUT SIGNAL, AND ROTATIONAL SPEED MEASUREMENT DEVICE COMPRISING SUCH A CIRCUIT ARRANGEMENT
App. No. 10/560,451
→
Overdrive Technique for Display Drivers
App. No. 11/576,684
→
METHOD OF ADHESION MEASUREMENT AT THE INTERFACE BETWEEN LAYERS
App. No. 10/561,579
→
SEMICONDUCTORS DEVICE AND METHOD OF MANUFACTURING SUCH A DEVICE
App. No. 11/578,902
→
METHOD OF SECURELY READING DATA FROM A TRANSPONDER
App. No. 11/914,964
→
RFID TAG HAVING A FOLDED DIPOLE
App. No. 11/574,237
→
ONE-TIME AUTHENTICATION SYSTEM
App. No. 11/629,154
→
Radio Identification With an Additional Close-Range Check
App. No. 11/629,717
→
RF POWER SENSING CIRCUIT
App. No. 11/573,348
→
Electronic Component Having Tin Rich Deposit Layer and the Process for Depositing the Same
App. No. 11/632,029
→
Mobile Communication Device
App. No. 11/816,101
→
SYSTEM, DATA CARRIERS, READER AND METHOD FOR DETERMINING THE PERIPHERAL WHEEL SPEED AND DISTANCE
App. No. 11/721,040
→
DEVICE FOR AND METHOD OF PROVIDING OPERATING DATA AND/OR DATA ASSOCIATED WITH PLAYBACK DATA TO A REMOTE DEVICE
App. No. 11/814,366
→
SEMICONDUCTOR DEVICE WITH A SUPERPARAELECTRIC GATE INSULATOR
App. No. 11/722,518
→
BUS GUARDIAN AS WELL AS METHOD FOR MONITORING COMMUNICATION BETWEEN AND AMONG A NUMBER OF NODES, NODE COMPRISING SUCH BUS GUARDIAN, AND DISTRIBUTED COMMUNICATION SYSTEM COMPRISING SUCH NODES
App. No. 11/722,350
→
COMMUNICATION SYSTEM COMPRISING MASTER AND SLAVE HANDHELD APPARATUSES
App. No. 11/722,086
→
LITHOGRAPHIC METHOD
App. No. 11/720,315
→
MONITORING PHYSICAL OPERATING PARAMETERS OF AN INTEGRATED CIRCUIT
App. No. 11/720,190
→
MULTI-RESONANCE CONVERTER
App. No. 11/719,919
→
MAGNETORESISTIVE SPEED SENSOR
App. No. 10/585,064
→
ANTENNA CONFIGURATION
App. No. 10/594,021
→
ANTENNA
App. No. 10/589,838
→
INTEGRATED CIRCUIT WITH PHASE-CHANGE MEMORY CELLS AND METHOD FOR ADDRESSING PHASE-CHANGE MEMORY CELLS
App. No. 11/577,708
→
METAL-OXIDE-SEMICONDUCTOR DEVICE WITH A DOPED TITANATE BODY
App. No. 11/577,707
→
METHOD AND APPARATUS FOR ANALOGUE TO DIGITAL CONVERSION
App. No. 11/577,317
→
ELECTROMECHANICAL TRANSDUCER AND ELECTRICAL DEVICE
App. No. 10/570,435
→
HARD MACRO WITH CONFIGURABLE SIDE INPUT/OUTPUT TERMINALS, FOR A SUBSYSTEM
App. No. 11/576,685
→
METHOD AND DEVICE FOR FAST NEAR-FIELD COMMUNICATION
App. No. 11/576,458
→
PRESENCE CHECK OF OBJECTS
App. No. 11/575,486
→
DIGITAL TEMPERATURE SENSORS AND CALIBRATION THEREOF
App. No. 11/575,303
→
METHOD AND ARRANGEMENT FOR TEMPERATURE CALIBRATION
App. No. 10/562,101
→
WIRELESS TERMINAL, WIRELESS MODULE AND METHOD OF MANUFACTURING SUCH A TERMINAL
App. No. 11/574,010
→
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING THE SAME
App. No. 11/658,227
→
BIPOLAR TRANSISTOR AND METHOD OF MANUFACTURING THE SAME
App. No. 11/632,614
→
JITTER-FREE SAMPLE RATE CONVERSION
App. No. 11/631,401
→
PLANAR INDUCTOR
App. No. 11/630,586
→
HIGH FREQUENCY TRANSISTOR LAYOUT FOR LOW SOURCE DRAIN CAPACITANCE
App. No. 11/630,855
→
SEMICONDUCTOR DEVICES WITH A FIELD SHAPING REGION
App. No. 10/556,802
→
Bus Controller for Handling Split Transactions
App. No. 11/629,728
→
METHOD OF MANUFACTURING A STRAINED SEMICONDUCTOR LAYER, METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR SUBSTRATE SUITABLE FOR USE IN SUCH A METHOD INCLUDING HAVING A THIN DELTA PROFILE LAYER OF GERMANIUM CLOSE TO THE BOTTOM OF THE STRAINED LAYER
App. No. 11/629,684
→
SIGNAL PROCESSING ARRANGEMENT COMPRISING A FILTER
App. No. 11/628,908
→
SEMICONDUCTOR DEVICE AND METHOD FOR MANUFACTURE
App. No. 11/628,130
→
BITSTREAM CONTROLLED REFERENCE SIGNAL GENERATION FOR A SIGMA-DELTA MODULATOR
App. No. 11/628,126
→
GRAVITY COMPENSATION DEVICE FOR A CHIP TRANSFER APPARATUS
App. No. 11/628,127
→
RECORDING AND STORING A TEMPERATURE
App. No. 11/597,882
→
FUSE STRUCTURE HAVING REDUCED HEAT DISSIPATION TOWARDS THE SUBSTRATE
App. No. 10/572,422
→
Turbo Decoder Input Reordering
App. No. 11/597,044
→
PLOP NOISE AVOIDANCE FOR AN AMPLIFIER
App. No. 11/596,790
→
AMPLIFIER CIRCUIT WITH AUTOMATIC GAIN CORRECTION
App. No. 11/596,829
→
METHOD OF OPERATING A SHIELDED CONNECTION, AND COMMUNICATION NETWORK
App. No. 11/579,888
→
CIRCUIT ARRANGEMENT AND METHOD OF OPERATING SUCH CIRCUIT ARRANGEMENT
App. No. 11/579,896
→
SEMICONDUCTOR DEVICE AND METHOD OF MANUFACTURING SUCH A DEVICE
App. No. 11/568,196
→
INTEGRATED CIRCUIT, AND A MOBILE PHONE HAVING THE INTEGRATED CIRCUIT
App. No. 11/578,502
→
METHOD OF REDUCING INTER-SYMBOL INTERFERENCE, A SIGMA-DELTA CONVERTER FOR PERFORMING THIS METHOD AND A STORAGE MEDIUM CONVEYING INFORMATION GENERATED BY THIS METHOD
App. No. 10/594,488
→
METHOD OF MANUFACTURING A SEMICONDUCTOR DEVICE AND SEMICONDUCTOR DEVICE OBTAINED BY MEANS OF SAID METHOD
App. No. 10/599,032
→
ELECTRONIC STREAM PROCESSING CIRCUIT WITH TEST ACCESS
App. No. 10/589,922
→
HIGH VOLTAGE DRIVER CIRCUIT WITH FAST SLOW VOLTAGE OPERATION
App. No. 10/589,109
→
METHOD AND DEVICE FOR TESTING A PHASE LOCKED LOOP
App. No. 10/588,939
→
DA-CONVERTER SYSTEM AND A METHOD FOR CONVERTING A MULTI-BIT DIGITAL SIGNAL TO AN ANALOG SIGNAL
App. No. 10/588,115
→
SECURITY SYSTEM, IN PARTICULAR IN A MOTOR VEHICLE
App. No. 10/587,595
→
PROGRAMMABLE AND PAUSABLE CLOCK GENERATION UNIT
App. No. 10/587,608
→
METHOD AND APPARATUS FOR TESTING INTEGRATED CIRCUITS FOR SUSCEPTIBILITY TO LATCH-UP
App. No. 10/587,645
→
FREE-RUNNING NUMERICALLY-CONTROLLED OSCILLATOR USING COMPLEX MULTIPLICATION WITH COMPENSATION FOR AMPLITUDE VARIATION DUE TO CUMULATIVE ROUND-OFF ERRORS
App. No. 10/586,915
→
NON-VOLATILE SEMICONDUCTOR MEMORY
App. No. 10/488,377
→
MOS SWITCHING CIRCUIT
App. No. 10/586,507
→
SYSTEM FOR AUDIO SIGNAL PROCESSING
App. No. 10/597,179
→
METHOD AND APPARATUS FOR CONTROL OF A WRITE SIGNAL IN AN OPTICAL DISC SYSTEM
App. No. 10/585,907
→
PLL CIRCUIT
App. No. 10/585,779
→
METHOD FOR FABRICATION OF IN-LAID METAL INTERCONNECTS
App. No. 10/526,422
→