IP Library Granted Patent US 7,552,022
Granted Patent B2
US 7,552,022 · App. 10/562,101 · Granted Jun 23, 2009

Method and arrangement for temperature calibration

Assignee: NXP B.V.
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Quick Facts
Patent No.
US 7,552,022
App. No.
10/562,101
Granted
Jun 23, 2009
Kind
B2
Abstract

The invention concerns an arrangement on a semiconductor chip for calibrating temperature setting curve having a signal generation unit ( 2 ) for providing a first signal (I ptat1 , V ptat1 , f ptat1 ), which is proportional to the actual uncalibrated temperature T 1 of the chip. To avoid bringing the chip on a second temperature it is proposed to read a first signal (I ptat1 , V ptat1 , f ptat1 ), which is proportional to the actual uncalibrated temperature T 1 of the chip and generate a signal offset (I virt , V virt , f virt ), which is combined with the first signal (I ptat1 , V ptat1 , f ptat1 ) defining a second signal (I ptat2 , V ptat2 , f ptat2 ) and to extract a first actual temperature T 1 from the first signal (I ptat1 , V ptat1 , f ptat1 ) and a second uncalibrated temperature T 2 from the second signal (I ptat2 , V ptat2 , f ptat2 ).

Claims (17)

1. Arrangement on a semiconductor chip for calibrating a temperature setting curve having

a signal generation unit for providing a first signal, which is proportional to an actual temperature of the chip, whereby a signal offset is creatable by the signal generation unit, which is combined with the first signal to define a second signal; and

a temperature extraction unit receiving the first signal and the second signal for calculating a first temperature point based on the first signal and for calculating a second temperature point based on the second signal, wherein the second temperature point is a virtual temperature point and wherein the first and second temperature points are different from each other, wherein the second temperature point does not exist in the semiconductor chip during calibration of the temperature setting curve.

2. Arrangement as claimed in claim 1 , whereby the first signal, which is proportional to the actual temperature of the chip, is a current, a voltage or a frequency.

3. Arrangement as claimed in claim 1 , whereby the first signal and the second signal are convertible into digital signals, whereby the temperature extraction unit calculates the first and second temperature points for calibrating the temperature setting curve.

4. Method as claimed in claim 1 , whereby the signal offset is subtracted from the first signal or added to the first signal defining the second signal, which is provided to the temperature extraction unit.

5. The arrangement as claimed in claim 1 wherein the temperature extraction unit calibrates a temperature setting curve using the first temperature point and the second virtual temperature point, both of which are a function of the actual temperature.

6. The arrangement as claimed in claim 1 wherein the temperature setting curve is calibrated using only a single actual temperature point, where the single actual temperature point represents an actual temperature of the chip.

7. Method for calibrating a temperature setting curve of a temperature sensor arrangement on a semiconductor chip, the method comprising:

reading a first signal, which is proportional to an actual temperature of the semiconductor chip;

generating a signal offset, which is combined with the first signal to define a second signal;

extracting a first actual temperature from the first signal and a second virtual temperature from the second signal, wherein the first actual temperature and the second virtual temperature are different from each other and wherein the second virtual temperature does not exist on the semiconductor chip during calibration of the temperature setting curve; and

calibrating a temperature setting curve of the semiconductor chip using the first actual temperature and the second virtual temperature.

8. Method as claimed in claim 7 , whereby the first actual temperature and the second virtual temperature are used for providing calibration parameters to the semiconductor chip.

9. Method as claimed in claim 8 , whereby calculating calibration parameters can be performed on-chip or off-chip.

10. Method as claimed in claim 7 , whereby additional signal offsets are provided for calculating more than two temperature points and calibrating the temperature setting curve.

11. The method as claimed in claim 7 wherein the temperature setting curve is calibrated using only a single actual temperature point, where the single actual temperature point represents an actual temperature of the chip.

Assignments (13)
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042985 FRAME 0001. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 042762 FRAME 0145. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051145/0184 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051030/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12298143 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Oct 22, 2019
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 051029/0387 →
RELEASE OF SECURITY INTEREST Recorded Sep 10, 2019
From: MORGAN STANLEY SENIOR FUNDING, INC.
To: NXP B.V.
Reel/Frame 050745/0001 →
CHANGE OF NAME Recorded Sep 22, 2017
From: PHILIPS SEMICONDUCTORS INTERNATIONAL B.V.
To: NXP B.V.
Reel/Frame 043951/0436 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Sep 22, 2017
From: KONINKLIJKE PHILIPS ELECTRONICS N.V.
To: PHILIPS SEMICONDUCTORS INTERNATIONAL B.V.
Reel/Frame 043955/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042985/0001 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12681366 PREVIOUSLY RECORDED ON REEL 039361 FRAME 0212. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded May 9, 2017
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 042762/0145 →
CORRECTIVE ASSIGNMENT TO CORRECT THE REMOVE APPLICATION 12092129 PREVIOUSLY RECORDED ON REEL 038017 FRAME 0058. ASSIGNOR(S) HEREBY CONFIRMS THE SECURITY AGREEMENT SUPPLEMENT. Recorded Jul 14, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 039361/0212 →
SECURITY AGREEMENT SUPPLEMENT Recorded Mar 7, 2016
From: NXP B.V.
To: MORGAN STANLEY SENIOR FUNDING, INC.
Reel/Frame 038017/0058 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Aug 17, 2007
From: KONINKLIJKE PHILIPS ELECTRONICS N.V.
To: NXP B.V.
Reel/Frame 019719/0843 →
ASSIGNMENT OF ASSIGNOR'S INTEREST Recorded Mar 13, 2007
From: ROMIER, SACHA; OELHAFEN, PATRICK
To: KONINKLIJKE PHILPS ELECTRONICS N.V.
Reel/Frame 019006/0551 →
Priority Claims (1)
EP 03101916 · Jun 27, 2003 · regional
Continuity (1)
Related Publication 20070195858A1 · Aug 23, 2007